From: Aric Cyr <[email protected]>

[Why]
Many VR headsets require a HSYNC width of 4, but DCN
has default minimum of 8.

[How]
Change the arbitrary minimum HSYNC width to 4 to match
DCN20.

Signed-off-by: Aric Cyr <[email protected]>
Reviewed-by: Charlene Liu <[email protected]>
Reviewed-by: Jun Lei <[email protected]>
Acked-by: Qingqing Zhuo <[email protected]>
---
 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c | 2 +-
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c               | 2 +-
 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c               | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c 
b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
index 82bc4e192bbf..915fbb8e8168 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
@@ -1268,7 +1268,7 @@ void dce120_timing_generator_construct(
        tg110->min_h_front_porch = 0;
        tg110->min_h_back_porch = 0;
 
-       tg110->min_h_sync_width = 8;
+       tg110->min_h_sync_width = 4;
        tg110->min_v_sync_width = 1;
        tg110->min_v_blank = 3;
 }
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
index a125d3f05c81..48ccdcc17ede 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
@@ -1540,7 +1540,7 @@ void dcn10_timing_generator_init(struct optc *optc1)
        optc1->min_h_blank = 32;
        optc1->min_v_blank = 3;
        optc1->min_v_blank_interlace = 5;
-       optc1->min_h_sync_width = 8;
+       optc1->min_h_sync_width = 4;
        optc1->min_v_sync_width = 1;
 }
 
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c 
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
index b1f228fc119a..3ba3991ee612 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
@@ -350,7 +350,7 @@ void dcn30_timing_generator_init(struct optc *optc1)
        optc1->min_h_blank = 32;
        optc1->min_v_blank = 3;
        optc1->min_v_blank_interlace = 5;
-       optc1->min_h_sync_width = 8;
+       optc1->min_h_sync_width = 4;
        optc1->min_v_sync_width = 1;
 }
 
-- 
2.17.1

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