I think this has been talked about in the past here, but I'm interested in 
helping bringing JIT emulation to ArcEm (And other projects, e.g. RPCEmu)

So the first question is - does anyone know of any active attempts to 
produce an open source ARM JIT emulator? (Preferably ARM-on-ARM, or 
something which could be extended to support ARM-on-ARM). Or if there 
aren't any active projects, who else would be interested in working on 
one?

Assuming there isn't already a project, I've started to draw up plans for 
my own ARM-on-ARM JIT emulator. If you guys are interested then I'd like 
to run it by you just to make sure I'm not making any stupid mistakes.

The basic plan is for the emulator to be a 'plug and play' solution - your 
project will need an existing interpreter, and the JIT will just take 
over execution for whatever instruction sequences it can. This will 
simplify the design somewhat, at the expense of speed (I.e. initial 
versions may not emulate branch instructions). The interface to the JIT 
engine is being kept relatively simple, so it should be easy to plug into 
whatever project needs it, or to rewrite the internals so it produces 
x86/PPC/etc. assembler.

Currently the emulator is targeted at emulating CPU's with a 26bit PSR, 
but I think it will be fairly easy to make it so the CPU type can be 
specified at compile/run time. The code it produces will be 26/32bit 
neutral (Or targeted for whatever mode the host CPU is running in).

The only major downside I can see from an emulation standpoint is that it 
might not accurately model the instruction timings, and it probably won't 
allow interrupts to halt a JIT sequence. I'm guessing this is the norm for
JIT engines.

If you want any more information then just ask - in fact the code is 
nearly at the stage where I can get a few simple instructions JITed and 
running in a test program.

Cheers,

- Jeffrey

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