On Tue, Jan 16, 2007 at 09:47:40PM +0000, Jeffrey Lee wrote:
> I think this has been talked about in the past here, but I'm interested in 
> helping bringing JIT emulation to ArcEm (And other projects, e.g. RPCEmu)
> 
> So the first question is - does anyone know of any active attempts to 
> produce an open source ARM JIT emulator? (Preferably ARM-on-ARM, or 
> something which could be extended to support ARM-on-ARM).

QEMU is the fairly common answer here, it's a multi-architecture on 
multi-architecture JIT and hardware emulation platform. A QEMU based 
emulator would offer a considerable speed increase over interpreted 
emulators such as Arcem and RPCemu. It provides two kinds of emulation

1) System emulation, a traditional emulator, emulates the processor and 
   hardware of a complete computer.
2) User emulation, run binaries for other CPU architectures on your host 
   processor.

http://fabrice.bellard.free.fr/qemu/
http://fabrice.bellard.free.fr/qemu/status.html

(note that ARM emulation is supported, but running on ARM hardware is 
noted as being in Testing)

QEMUs ARM support if for the ARM9 chip, a 32bit only arm variant. QEMU 
runs on Windows/Linux and Macos X.

There have been up to 3 attempts to use QEMU with RISC OS or RISC OS 
capable hardware

1) Daniel Clarke added 26 bit support and parts of A7000/RPC hardware in 
   an attempt to provide 'System Emulation'. Daniel ran into problems and 
   threw down the guantlet (and code) to all interested about 9 months 
   ago. See note 1.ANDABIT below
2) http://www.riscos.info/index.php/QEMU An attempt to run RISC OS 
   binaries under linux in 'User Emulation', Must do lots of work for SWIs
   and will be RISC OS only.
3) A certain Mr Justin Fletcher accasionally posts to the QEMU mailing 
   list discussing attempting to run a non-linux OS on QEMU. Whether he 
   needed to add 26 bit support is unknown.

1.ANDABIT) My brother has managed to take Daniels code a fair amount 
   further. Hopefully these image should give an idea how far

http://www.home.marutan.net/Screenshot-1.png
http://www.home.marutan.net/Screenshot-3.png
http://www.home.marutan.net/Screenshot-4.png

   ofla!!!!

   But has now also run into issues. If anyone wants to help carrying this 
   on further I'll open access to the svn repository that are changes are 
   on. If we ever get a working RPC emulator it's our intention to submit 
   the changes to the main QEMU repository.


> Or if there 
> aren't any active projects, who else would be interested in working on 
> one?
> 
> Assuming there isn't already a project, I've started to draw up plans for 
> my own ARM-on-ARM JIT emulator. If you guys are interested then I'd like 
> to run it by you just to make sure I'm not making any stupid mistakes.
> 

There's not much I can comment about writting JITs other than to say my 
vague experience with QEMU is that it is bloody complicated, considerably 
beyond the complexity of the interpreter in Arcem. Hopefully my brother 
will answer an email for once and reply to some of your questions ;)

> The basic plan is for the emulator to be a 'plug and play' solution - your 
> project will need an existing interpreter, and the JIT will just take 
> over execution for whatever instruction sequences it can. This will 
> simplify the design somewhat, at the expense of speed (I.e. initial 
> versions may not emulate branch instructions). The interface to the JIT 
> engine is being kept relatively simple, so it should be easy to plug into 
> whatever project needs it, or to rewrite the internals so it produces 
> x86/PPC/etc. assembler.
> 
> Currently the emulator is targeted at emulating CPU's with a 26bit PSR, 
> but I think it will be fairly easy to make it so the CPU type can be 
> specified at compile/run time. The code it produces will be 26/32bit 
> neutral (Or targeted for whatever mode the host CPU is running in).
> 
> The only major downside I can see from an emulation standpoint is that it 
> might not accurately model the instruction timings, and it probably won't 
> allow interrupts to halt a JIT sequence. I'm guessing this is the norm for
> JIT engines.
> 
> If you want any more information then just ask - in fact the code is 
> nearly at the stage where I can get a few simple instructions JITed and 
> running in a test program.
> 

-- 
Peter Howkins
[EMAIL PROTECTED]

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