If you got your device tree correctly set up, maybe try this diff:
diff --git a/sys/dev/fdt/if_dwxe.c b/sys/dev/fdt/if_dwxe.c
index 85c5098af31..ce6a4e0f338 100644
--- a/sys/dev/fdt/if_dwxe.c
+++ b/sys/dev/fdt/if_dwxe.c
@@ -236,6 +236,7 @@ struct dwxe_desc {
#define SYSCON_H3_EPHY_LED_POL (1 << 17) /* 1: active low, 0: active
high */
#define SYSCON_H3_EPHY_CLK_SEL (1 << 18) /* 1: 24MHz, 0: 25MHz */
#define SYSCON_H3_EPHY_ADDR_SHIFT 20
+#define SYSCON_H3_EPHY_ADDR_MASK 0x1f
struct dwxe_buf {
bus_dmamap_t tb_map;
@@ -270,6 +271,7 @@ struct dwxe_softc {
struct mii_data sc_mii;
#define sc_media sc_mii.mii_media
int sc_link;
+ int sc_phyloc;
struct dwxe_dmamem *sc_txring;
struct dwxe_buf *sc_txbuf;
@@ -357,7 +359,6 @@ dwxe_attach(struct device *parent, struct device *self,
void *aux)
struct fdt_attach_args *faa = aux;
struct ifnet *ifp;
int phy, phy_supply, node;
- int phyloc = MII_PHY_ANY;
sc->sc_node = faa->fa_node;
sc->sc_iot = faa->fa_iot;
@@ -372,7 +373,7 @@ dwxe_attach(struct device *parent, struct device *self,
void *aux)
phy = OF_getpropint(faa->fa_node, "phy", 0);
node = OF_getnodebyphandle(phy);
if (node)
- phyloc = OF_getpropint(node, "reg", phyloc);
+ sc->sc_phyloc = OF_getpropint(node, "reg", MII_PHY_ANY);
pinctrl_byname(faa->fa_node, "default");
@@ -424,7 +425,7 @@ dwxe_attach(struct device *parent, struct device *self,
void *aux)
dwxe_reset(sc);
- mii_attach(self, &sc->sc_mii, 0xffffffff, phyloc,
+ mii_attach(self, &sc->sc_mii, 0xffffffff, sc->sc_phyloc,
MII_OFFSET_ANY, 0);
if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
printf("%s: no PHY found!\n", sc->sc_dev.dv_xname);
@@ -466,8 +467,14 @@ dwxe_phy_setup(struct dwxe_softc *sc)
syscon |= SYSCON_EPIT | SYSCON_ETCS_EXT_GMII;
else if (!strncmp(phy_mode, "mii", strlen("mii")) &&
OF_is_compatible(sc->sc_node, "allwinner,sun8i-h3-emac")) {
- panic("%s: setup internal phy", DEVNAME(sc));
- return;
+ syscon &= ~SYSCON_H3_EPHY_SHUTDOWN;
+ syscon |= SYSCON_H3_EPHY_SELECT|SYSCON_H3_EPHY_CLK_SEL;
+ if (OF_getproplen(sc->sc_node, "allwinner,leds-active-low") >=
0)
+ syscon |= SYSCON_H3_EPHY_LED_POL;
+ else
+ syscon &= ~SYSCON_H3_EPHY_LED_POL;
+ syscon &= ~(SYSCON_H3_EPHY_ADDR_MASK <<
SYSCON_H3_EPHY_ADDR_SHIFT);
+ syscon |= sc->sc_phyloc << SYSCON_H3_EPHY_ADDR_SHIFT;
}
free(phy_mode, M_TEMP, len);
On Wed, Sep 27, 2017 at 10:56:44PM +0200, Patrick Wildt wrote:
> So, first of all copying the dtb entries is not a good idea. The reason
> is that the phandles are gonna be all wrong and overriden, because those
> are _generated_ on compile time. As you can see, the ethernet
> controller references phy handle 0x7, but the phy has a phandle of 0x47.
> Something is wrong there.
>
> You should try to apply this "revert" that was committed in linux. Hope
> they'll soon make up their minds and commit a newer version.
>
> That said, for your specific machine I'll have to change some code to
> use the internal phy instead of the external one. Without it, if you're
> doing all right with the device tree, it should actually panic saying
> "gwxe0: setup internal phy".
>
> Patrick
>
> commit fe45174b72aead678da581bab9e9a37c9b26a070
> Author: Maxime Ripard <[email protected]>
> Date: Fri Aug 25 20:36:48 2017 +0200
>
> arm: dts: sunxi: Revert EMAC changes
>
> Since the discussion is not settled yet for the EMAC, and that the release
> in getting really close, let's revert the changes for now, and we'll
> reintroduce them later.
>
> Acked-by: Chen-Yu Tsai <[email protected]>
> Signed-off-by: Maxime Ripard <[email protected]>
>
> diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> index 6713d0f2b3f4..b1502df7b509 100644
> --- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> +++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> @@ -56,8 +56,6 @@
>
> aliases {
> serial0 = &uart0;
> - /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
> - ethernet0 = &emac;
> ethernet1 = &xr819;
> };
>
> @@ -104,13 +102,6 @@
> status = "okay";
> };
>
> -&emac {
> - phy-handle = <&int_mii_phy>;
> - phy-mode = "mii";
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> &mmc0 {
> pinctrl-names = "default";
> pinctrl-0 = <&mmc0_pins_a>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> index d756ff825116..a337af1de322 100644
> --- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> @@ -52,7 +52,6 @@
> compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
>
> aliases {
> - ethernet0 = &emac;
> serial0 = &uart0;
> serial1 = &uart1;
> };
> @@ -115,30 +114,12 @@
> status = "okay";
> };
>
> -&emac {
> - pinctrl-names = "default";
> - pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> - phy-handle = <&ext_rgmii_phy>;
> - phy-mode = "rgmii";
> -
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> &ir {
> pinctrl-names = "default";
> pinctrl-0 = <&ir_pins_a>;
> status = "okay";
> };
>
> -&mdio {
> - ext_rgmii_phy: ethernet-phy@1 {
> - compatible = "ethernet-phy-ieee802.3-c22";
> - reg = <0>;
> - };
> -};
> -
> &mmc0 {
> pinctrl-names = "default";
> pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> index 78f6c24952dd..8d2cc6e9a03f 100644
> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> @@ -46,10 +46,3 @@
> model = "FriendlyARM NanoPi NEO";
> compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
> };
> -
> -&emac {
> - phy-handle = <&int_mii_phy>;
> - phy-mode = "mii";
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
> index 17cdeae19c6f..8ff71b1bb45b 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
> @@ -54,7 +54,6 @@
> aliases {
> serial0 = &uart0;
> /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
> - ethernet0 = &emac;
> ethernet1 = &rtl8189;
> };
>
> @@ -118,13 +117,6 @@
> status = "okay";
> };
>
> -&emac {
> - phy-handle = <&int_mii_phy>;
> - phy-mode = "mii";
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> &ir {
> pinctrl-names = "default";
> pinctrl-0 = <&ir_pins_a>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
> index 6880268e8b87..5fea430e0eb1 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
> @@ -52,7 +52,6 @@
> compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
>
> aliases {
> - ethernet0 = &emac;
> serial0 = &uart0;
> };
>
> @@ -98,13 +97,6 @@
> status = "okay";
> };
>
> -&emac {
> - phy-handle = <&int_mii_phy>;
> - phy-mode = "mii";
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> &mmc0 {
> pinctrl-names = "default";
> pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
> index a10281b455f5..8b93f5c781a7 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
> @@ -53,11 +53,6 @@
> };
> };
>
> -&emac {
> - /* LEDs changed to active high on the plus */
> - /delete-property/ allwinner,leds-active-low;
> -};
> -
> &mmc1 {
> pinctrl-names = "default";
> pinctrl-0 = <&mmc1_pins_a>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> index 998b60f8d295..1a044b17d6c6 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> @@ -52,7 +52,6 @@
> compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
>
> aliases {
> - ethernet0 = &emac;
> serial0 = &uart0;
> };
>
> @@ -114,13 +113,6 @@
> status = "okay";
> };
>
> -&emac {
> - phy-handle = <&int_mii_phy>;
> - phy-mode = "mii";
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> &ir {
> pinctrl-names = "default";
> pinctrl-0 = <&ir_pins_a>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> index 331ed683ac62..828ae7a526d9 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
> @@ -47,10 +47,6 @@
> model = "Xunlong Orange Pi Plus / Plus 2";
> compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
>
> - aliases {
> - ethernet0 = &emac;
> - };
> -
> reg_gmac_3v3: gmac-3v3 {
> compatible = "regulator-fixed";
> regulator-name = "gmac-3v3";
> @@ -78,24 +74,6 @@
> status = "okay";
> };
>
> -&emac {
> - pinctrl-names = "default";
> - pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> - phy-handle = <&ext_rgmii_phy>;
> - phy-mode = "rgmii";
> -
> - allwinner,leds-active-low;
> - status = "okay";
> -};
> -
> -&mdio {
> - ext_rgmii_phy: ethernet-phy@1 {
> - compatible = "ethernet-phy-ieee802.3-c22";
> - reg = <0>;
> - };
> -};
> -
> &mmc2 {
> pinctrl-names = "default";
> pinctrl-0 = <&mmc2_8bit_pins>;
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> index 80026f3caafc..97920b12a944 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
> @@ -61,19 +61,3 @@
> gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
> };
> };
> -
> -&emac {
> - pinctrl-names = "default";
> - pinctrl-0 = <&emac_rgmii_pins>;
> - phy-supply = <®_gmac_3v3>;
> - phy-handle = <&ext_rgmii_phy>;
> - phy-mode = "rgmii";
> - status = "okay";
> -};
> -
> -&mdio {
> - ext_rgmii_phy: ethernet-phy@1 {
> - compatible = "ethernet-phy-ieee802.3-c22";
> - reg = <1>;
> - };
> -};
> diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> index d38282b9e5d4..11240a8313c2 100644
> --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> @@ -391,32 +391,6 @@
> clocks = <&osc24M>;
> };
>
> - emac: ethernet@1c30000 {
> - compatible = "allwinner,sun8i-h3-emac";
> - syscon = <&syscon>;
> - reg = <0x01c30000 0x10000>;
> - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "macirq";
> - resets = <&ccu RST_BUS_EMAC>;
> - reset-names = "stmmaceth";
> - clocks = <&ccu CLK_BUS_EMAC>;
> - clock-names = "stmmaceth";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> -
> - mdio: mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - int_mii_phy: ethernet-phy@1 {
> - compatible =
> "ethernet-phy-ieee802.3-c22";
> - reg = <1>;
> - clocks = <&ccu CLK_BUS_EPHY>;
> - resets = <&ccu RST_BUS_EPHY>;
> - };
> - };
> - };
> -
> spi0: spi@01c68000 {
> compatible = "allwinner,sun8i-h3-spi";
> reg = <0x01c68000 0x1000>;
