I already received assembled 3U boards including VHDCI carrier and BNC IO. So we can test whole setup in the lab quickly. You can help us with simple HDL design for KC705 that i.e. toggles IOs or makes loopback: ttl->lvds->VHDCI-> FPGA-> VHDCI->lvds->TTL. At the moment we are so occupied with other tasks that every help is very valuable. Greg
On 10 March 2017 at 14:33, Thomas Harty <[email protected]> wrote: > > It is compatible with VHDCI carrier - I used the same pinout. > > Thanks for confirming that. In that case, we'll have a few of these made > up, and plan to use them with the KC705 + VHDCI carrier as a short-term > solution. > > > -----Original Message----- > From: ARTIQ [mailto:[email protected]] On Behalf Of Thomas > Harty via ARTIQ > Sent: Friday, March 10, 2017 12:56 PM > To: [email protected] > Subject: Re: [ARTIQ] ARTIQ Digest, Vol 34, Issue 3 > > > ..., and we might spin up some in-house boards for multichannel DAC over > SPI. > > FYI, the Zotino and Novogorny DAC/ADC EEMs are now funded > (Oxford/Freiburg) and being designed by WUT. They should be ready in > ~12weeks. We're planning to contract M-Labs to provide full support for > them. > > The draft specifications are on the Wiki at https://github.com/m-labs/ > sinara/wiki feel free to comment on them if you have requests/questions. > > > What adapters in particular? http://www.ohwr.org/projects/fmc-vhdci? > > @Greg, can you confirm whether this is compatible with the VHDCI carrier? > _______________________________________________ > ARTIQ mailing list > https://ssl.serverraum.org/lists/listinfo/artiq > >
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