I already have a 100MHz (non-programmable) clock in the lab, so I prefer to continue supporting that in all levels (firmware, hardware, etc.) in the long term. That said, the workarounds are not too onerous for getting up and running initially--either Dan's suggestion of a non-standard 150MHz clock or Tom's suggestion of modifying the dividers in our lab-specific bitstream build would allow us to see full performance in the lab for device testing.
Best, Kristi Beck
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