On Tue, Jul 17, 2018 at 5:52 PM Slichter, Daniel H. (Fed) via ARTIQ
<[email protected]> wrote:
> > You just need to get away from specifying sample rates and
> > details of the DSP chain and start specifying the actual use cases.
>
> My apologies; I thought I had sent an email to the entire list but it turns 
> out it just went to Sebastien.  I reproduce the email I sent Sebastien last 
> Friday below (with a couple of minor clarifications), which gives our use 
> cases and the motivation for wanting to run at 1 GSPS as well as 600 MSPS.

Thanks.

> > What sample rate(s) would you like to see and why?
>
> The primary application here would be the driving of AOMs centered at 220 MHz 
> (which could be done at 600 MSPS in theory) or 330 MHz (much harder to avoid 
> Nyquist images at 600 MSPS).  We would most likely want 1 GSPS, with an RTIO 
> clock of 125 MHz, which also aids compatibility with our other hardware and 
> its RTIO clock frequencies (although some of our setups run with 100 MHz RTIO 
> clock, and thus we'd aim for 8x multiplexing still but which would yield 800 
> MSPS -- still suitable for the 220 MHz and 330 MHz AOMs though).  For a 1 
> GSPS data rate, the DAC clock could be run at 1 GSPS, or with the 2x 
> interpolation enabled at 2 GSPS.  We also have AOMs at ~600 MHz that we would 
> like to drive.  For this application, we would take the second Nyquist image 
> running at 1 GSPS with no DAC interpolation, probably in mix mode and define 
> our band with filters afterwards (200 MHz would then separate first and 
> second Nyquist images so easy to filter).  For obvious reasons 600 MSPS would 
> be a very poor data rate choice for this application.
>
> The second application for this would be microwave hyperfine transitions 
> accessed using single-sideband mixing with the Sayma outputs as the I and Q 
> inputs to an external mixer.  Having 1 GSPS data rates would give us 
> sufficient bandwidth to span the hyperfine manifold of 25Mg+ qubits at 
> intermediate field (212 G); running at 600 GSPS (for example) would not allow 
> this, as spanning all relevant hyperfine transitions for shelving requires 
> ~700 MHz of bandwidth (350 MHz on each side of a carrier would work).  For 
> this application, we would likely want to use 2x DAC interpolation to improve 
> spectral purity and clean up undesired Nyquist images.
>
> Because of the way the internals of the DAC work, using the NCO in the DAC to 
> shift signals to higher Nyquist bands forces the outputs to be paired as I/Q 
> channels, so for direct synthesis of microwaves for 9Be+ or 25Mg+ qubits, one 
> would have to discard half the output channels.  For this task we would 
> probably perform updates of the internal NCO to shift frequencies coarsely, 
> but data rates of 1 GSPS would allow 2x digital upconversion plus internal 
> NCO shifting to higher Nyquist zones, at the cost of half the output 
> channels, to enable direct output using mix-mode of signals up to 2 GHz, 
> placing undesired images out of harm's way for 9Be+ at low field.  At 
> intermediate field (119 G), relevant 9Be+ transitions are between 1 GHz and 
> 1.4 GHz, so using 800 MSPS with 2x digital upconversion and mix-mode would 
> probably work better.   Using 600 MSPS data rates with 4x upconversion would 
> enable signals out to 2.4 GHz, which would be more suitable for 25Mg+ direct 
> generation at 212 G (~1.3 GHz to ~2.1 GHz).

Ok. My question is about the parametrization of the waveform.

* Is (f0+f1, f0+f2) better than (f0+f1-f2, f0+f1+f2)? (with f0 coarse,
and f1/f2 fine) etc. Or other parametrizations.
* Is it better to have relative frequency/amplitude/phase or absolute
(additive or multiplicative) amplitude/frequency/phase between the
tones?
* Also consider all those things with the servoing and modulation
applications in mind that were initially required.
* What is the maximum step size of f0 in terms of the f1/f2 rate?
* What width is really needed for the FTW on f1/f2?
* What width do we need for the CORDICs (IQ)? Are we just beating the
spurs? Then we certainly don't need 16 bits. Or is 16 bit amplitude
resolution needed?

And saying "one LSB", "16 bit" or equivalent might sound convenient
but it's also potentially very expensive. If the requirement can't be
derived from physics, then something like the DAC SFDR would be a
reasonable target.

Everybody needs to weigh in here.

> > With high sample rates, there are two ways to ease the FPGA resource burden:
> > * use the DAC interpolation modes (2X, 4X, 8X) if the goal is simply
> > to improve spectral purity.
>
> I think we definitely would like to see these implemented to improve spectral 
> purity.  Implementation of the Nyquist band shifting with the DAC onboard NCO 
> would be good but can happen later as long as 1 GSPS data rates are supported.

> > * drastically reduce the SAWG digital upconverter resolution to a few
> > frequencies (use the other NCOs to for fine tuning).
>
> Referencing the Github comment that Tom referred to in his email: 
> https://github.com/sinara-hw/sinara/issues/515#issuecomment-371481089
>
> "Even up-conversion to n*k/m*f_RTIO (k=8=f_sample/f_RTIO here) with m=16 and 
> n \in {0,...,m-1} could turn out to be as simple as m=8."
>
> This kind of selection of available DUC frequencies on SAWG would be more 
> than enough from my perspective.  For finer compensation you could just put 
> the frequency shift in the sine waves generated at baseband, as pointed out 
> by Tom.

There are a couple user-visible differences that need to be considered
and signed off:

* Since you now can't place the carrier freely anymore, we need
requirements on carrier (DC) leakage and IQ imbalance. AFAICT those
can be low since it is all digital. But there are rounding errors and
it's not a given that they are small.
* With only a "coarse" carrier, to move the two tones, you now have to
move each individually with two RTIO commands. Currently you can just
nudge the carrier.

 The users and funders need to sign off the changes, the plan, and the specs.

And if resources become scarce on Sayma, we should first look at who
is using how much. IIRC last I checked a few months ago on Kasli the
DMA engine, the analyzer, and the SED network are the largest users,
in that order. On Sayma it might be different but it is not clear a
priori that SAWG is driving that as a dominantly "additive" resource
consumer.

Robert.
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