On 9/6/2010 2:01 PM, John McKown wrote:
I've been looking at the new Principles of Operation for zEnterprise
(the z196). Many of the new instructions make a lot of intuitive sense
to me. Such as the LOC (Load On Condition) set of instructions. And the
Compare and Branch) set. Being able to logically split a 64 bit register
to contain 2 32 bit registers makes sense also.
But some are a bit confusing to me. A case in point is the ALSI
instruction. It adds a signed immediate byte value (-128..+127) to 32 or
64 bit __unsigned__ integer. OK, this a 6 byte (3 halfword) instruction
which can replace an LY, AHI (restricted to -128..+127), STY sequence.
LY/AHI/STY would take 6+4+6==16 bytes, L/AHI/ST is 4+4+4==12 bytes. So
it is a good savings in terms of bytes of code and reduction in number
of instructions. But is it that prevalent? I know it is really to
support compilers (for things like the C code: A+=n where -128<=n<=127).
And why is it __unsigned__? The bit results are identical to signed, the
difference is in the meaning of the resulting condition code. I guess it
is for multi-operation ADD sequences?
Funny, to me, is that RISC was supposed to be the wave of the future
(way back when) due to simpler and faster hardware with smarter
compilers. Instead, we seem to have put the complexity into hardware
instead of the compiler. Hum, does this mean that the compiler writers
are not as smart as the hardware designers?<grin type="crooked"/>
The same with the new 3 operand instructions which basically implement
A=B+C. I would guess this is also to support the compiler writers so
that they can reserve a register over a number of instructions more
easily. I'm not a compiler writer, so this is a guess. Eg. to make it
easier to compile efficient code such as:
A=B+1
C=B+D
E=B*3
With 2 operand instructions, the variable B would need to be reloaded 3
times. With 2 operand instructions, only once.
But the ones that really confuse me (as to their utility) are then Load
And<logical operation> such as LOAD and AND/OR/XOR. But the
implementation for LOAD and ADD just stumps me. What needs this
sequence?
temp:=operand_2
operand_2:=operand_2+operand_3
operand_1:=temp
Operand_1& 2 are registers, operand_3 is memory. Is this for the same
reason as above? To save the contents of a specific 4 byte value so that
it is only loaded once? Is that sequence so very prevalent that it
merits these instructions? I really don't know!
Remember, these instructions are part of the Interlocked-Access
Facility, so the point is to accomplish the load and the
storage update as an atomic unit, so that no other CP sees
an inconsitent value: at one instant the storage location has
one value and the next instant it has a new value that was
caused by updating the original value with a value from a
register
I imagine the main applications are multi-threading applications
where such storage fields are used to keep track of, say, the
current number of threads running
Consider
LLAG 3,4,DBLWRD
after the instruction is executed, R3 has the original value in DBLWRD,
DBLWRD contains its previous value + c(R4), and R4 is unchanged
Without this, the sequence might be:
LG 3,DBLWRD
LGR 0,3
AGR 0,4
STG 0,DBLWRD
if DBLWRD is in storage accessible by another thread / task,
a different thread might pick up the value in DBLWRD after
any of the first three instructions and work with that as
the "one true value" of DBLWRD unless you used some form
of CS, CDS, PLO, etc. - which have significant performance
impacts
Just a guess, of course.
--
John McKown
Maranatha!<><
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