> -----Original Message-----
> From: IBM Mainframe Assembler List
> [mailto:[email protected]] On Behalf Of Robert
> A. Rosenberg
> Sent: Tuesday, September 07, 2010 12:26 AM
> To: [email protected]
> Subject: Re: Instruction Set Architecture
>
> At 15:01 -0500 on 09/06/2010, John McKown wrote about Instruction Set
> Architecture:
>
> >But some are a bit confusing to me. A case in point is the ALSI
> >instruction. It adds a signed immediate byte value
> (-128..+127) to 32 or
> >64 bit __unsigned__ integer. OK, this a 6 byte (3 halfword)
> instruction
> >which can replace an LY, AHI (restricted to -128..+127), STY
> sequence.
> >LY/AHI/STY would take 6+4+6==16 bytes, L/AHI/ST is 4+4+4==12
> bytes. So
> >it is a good savings in terms of bytes of code and reduction
> in number
> >of instructions. But is it that prevalent? I know it is really to
> >support compilers (for things like the C code: A+=n where
> -128<=n<=127).
> >And why is it __unsigned__? The bit results are identical to
> signed, the
> >difference is in the meaning of the resulting condition code.
>
> The result is ONLY the same if the original value is positive (high
> bit = 0). If it is negative (high bit = 1) then the result is wrong
> since it results in a positive intermediate value being subtracted
> from the signed value and a negative intermediate value being added
> to the signed value.
OK, a bit of a brain freeze on my part. Are you saying that the results, in
general, of an ADD vs. an ADD Logical (such as AR vs. ALR) will result in a
different result in the value (bit pattern) stored in the result operand? Or
are you just talking about the ALSI instruction? I did a fast test (below) and
the two instructions resulted in the same answer. I think that I'm
misunderstanding something.
$ STARTUP RMODE=24,AMODE=24
LA R3,R15
L R0,=F'1'
LR R2,R0
L R1,=F'-1'
LR R3,R1
AR R0,R1
ALR R2,R3
EXRL 0,*
J GOBACK
LTORG *
END $
At this end of the R2 is bit identical to R0.
--
John McKown
Systems Engineer IV
IT
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