Well, since reviewing TAM, does visual inspection of the following ring any
alarm bells?
XXXXXXX AMODE ANY CAN BE INVOKED BY 31 OR 24-BIT CALLER
USING *,R15 BASE REGISTERS
ST R15,LOADADDR ADDRESS WHERE CALLABLE ROUTINE LOADED
STM R0,R15,SAVEREGS SAVE REGISTERS INTO THIS ROUTINE
USING NUCON,R0 CMS NUCLEUS ADDRESSABILITY
USING WORK1,R8 ONLINE WORK AREA ADDRESSABILITY
LR R2,R1 COPY COBOL PARM AREA ADDRESS
L R1,AUSER ADDRESS OF CMS USER SAVE AREA
L R8,0(R1) ADDRESS OF ONLINE WORK AREA
MVC W1CBLPS1,0(R2) SAVE ADDR. FIRST PASS PARM GRP
TAM CALLED IN 24-BIT MODE?
BNZ *+8 NO-ADDR PASSED SHOULD ALREADY BE OK
NI W1CBLPS1,X'00' CLEAR HIGH ORDER BYTE OF PARM1 ADDR
Thanks,
- Mike Hartman
-----Original Message-----
From: IBM Mainframe Assembler List [mailto:[email protected]] On
Behalf Of Martin Trübner
Sent: Monday, June 06, 2011 5:39 AM
To: [email protected]
Subject: Re: How to code TAM instruction
Brian,
It is
TAM
JZ WE_ARE_IN24
JL WE_ARE_IN31_BIT_MODE
JO WE_ARE_ON_DOPE
And if he can not read POP or the short-ref, he probably should not code these
kind of programs.
Sorry- I could not resist ;-)
--
Martin
Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at
http://www.picapcpu.de
