From: glen herrmannsfeldt Sent: Saturday, 16 February 2013 7:51 AM
Instructions are hard to count, though instruction count isn't a very good way to determine CISCness.
RISC tends to have a small number of instruction lengths, often 1. S/360 through z/ have three lengths. Not too CISCy,
The S/360 is clearly definitely and unequivocably a CISC machine. Think of instructions like ED, EDMK, TR, TRT, PACK, UNPK, CVB, CVD, and of course all the decimal arithmetic instructions, all the character move and compare instructions (except the immediate instructions). Then there are the shift instructions, whose times depend on the number of positions to be shifted; the floating-point instructions, which pre- and/or post-normalize (except for Halve); multiply and divide instructions. Then for the S/370, instructions like MVCL and CLCL were added.
but not RISC. (VAX might have 14 or so, from one byte on up.)
RISC tends to minimize address modes. Some have been added lately, but the largest fraction of instructions executed should still be RR or RX. Not too CISCy,
Think of shift, multiply, divide, the floating-point instructions and especially the decimal float instructions, etc. And in commercial work, decimal instructions would feature.
but not so RISCy, either.
VAX has many address modes, 21 on the list that I have, but 14 of those also have an indexed mode, so it should be 35. And there can be more than one such address per instruction. (Many operands are register only, but I am pretty sure that there are some where two operands can have one of those 35.)
Many RISC systems try to execute every instruction in one cycle. That brought things like MULTIPLY_STEP, an instruction that did part of a multiply, but that had to be executed many times to do an actual multiply. Most try to avoid this now.
There are some pretty complicated instructions even from S/360,
Most are: shift, multiply, divide, float (decimal and binary), decimal, character, not to mention TRT, TR, ED, EDMK, MVCL, CLCL, PACK, UNPK, CVB, CVD, ...
and many complicated ones added later, which are pretty CISCy.
Still, in terms of instruction length and address modes, not so bad.
As for address modes, there are d-i-b, d-b, d, rr (actual address), relative address ...
