At 06:37 -0700 on 08/07/2013, Duffy Nightingale wrote about Re: Concatanate Bits Instruction?:
Hi All, Thanks much to everyone who responded for all the hints and tips. Someday I hope to be of use to someone on this thread! Andreas, I think you caught a mistake in my "specs". It is small bit strings being added, concatenated, modified whatever you wish to call it. But the BIT strings are 4, 7, 10 BITS (Not bytes!) long. I took Mr. Rosenberg's "shift register pair" idea and coded it up. Essentially we are using R14 as a buffer and "loading" the buffer by putting the bits to insert in the left most bits of R15, then shift double logical left to load into the buffer (R14). Watching for R14 to fill up, saving to the end of the string, etc. Did not take a lot of code and am testing it now. It is amazing how much data you can store this way - when you use the least amount of bits to represent the data.
I refined my original suggestion in private messages to Duffy so I will summarize the additions to my original suggestion here. 1) Keep inserting new bits into the high end of R15 and then shift left double logical R15 into R14. 2) When the next set of bits are going to be longer than the amount of padding in the high end of R14 (the high bits are not part of the string since the register was all 0 padding which shrinks as the bits are shifted from R15 into R14) shift R14 left logical to align the string to the high end of the register and save the register to memory. Increment the sting length by the correct number of bits and bump the save location so it points at the partial byte (unless the saved string length is an 8 bit multiple). 3) XR R14,R14 to zero the register, load the partial byte into the high end of R15, and shift double logical to load it into the low bits of R14. 4) Resume the R15 bit loading and Shift Left Double Logical operation. While I can post the code here (as others have done) I think the above along with my original suggestion explains all the processing needed. Unless asked, I will not bother to post illustrations showing the status of the registers at different points in the process.
Have a good day all, Duffy -----Original Message----- From: IBM Mainframe Assembler List [mailto:[email protected]] On Behalf Of robin Sent: Tuesday, August 06, 2013 12:55 AM To: [email protected] Subject: Re: Concatanate Bits Instruction? Seems unduly and unnecessarily complicated to me. I'm a believer in the KISS principle. From: "Andreas F. Geissbuehler" <[email protected]> Sent: Tuesday, 6 August 2013 12:30 AM Duffy, Assuing you meant "concatenate" as in appending 57 bits to the end of a bitstring of say 395 bits which when done will have grown to 395+57=452 bits, and "The len of the bit strings to add are 4, 7, 10 BYTES" long you could do it WITHOUT register bit shifting loops using old fashion OS/360 instructions Here, the "pseudo code" to explain how: A DC XL16'00' work area A B DC XL16'00' work area B STR DC B'011011101011000111' source needs alignement 0..7 bits TBL DC 64AL1((*-TBL)*2) to do 1-bit "shift-left' * ALIGN BITS TO BE ADDED/APPENDED: * 2 regs are needed: * Rp addr.pointer to right-most byte of target * Rn number of significant bits in that byte LTR R0,Rn JNP noshift required MVO B,STR assume 4-bit shift N R0,=F'3' apply AND-mask JZ X needed 4-bit shift only UNPK A,STR makes space for bit shift MVZ A,=16X'00' clears hi-nibble T TR A,TBL repeat this "SHIFT-LEFT" 0..2 times BCT R0,T MVO B,A aligns A for PACK MVO A,B aligns B for OC OC B,A "doubles" up the shifted nibbles PACK A,B chop bitstring on new nibble boundary MVC B,A assume we are done CHI Rn,4 test bit count JNH *+10 fewer than 4 bits MVO B,A shift another 4 bits X OC 0(n,Rp).B append new bits to target "bitstring" LA Rp, ... update addr.ptr for next append AR Rn, ... prev.no. of signifant bit + newly appended N Rn,=F'7' = significant bits at Rp You need offset and length adjustments, e.g, MVO A+1(L'A-1),B to get extra work bits and keeps the packed decimal sign bits out of bitstring. An MVO by itself does a shift of 4-bits... Let's play Computer ! To make it easier for our eye we assign a symbolic name to each bit in STR above: | abcd | efgh | ijkl | mnop | qr__ | 18 bits in 5 nibbles After the initial UNKP and MVZ the bits are spaced out like this: ____abcd____efgh____ijkl____mnop____qr__ The TR doubles the value of each nibble, eg. 0000 stays 0000 wheras 0011 -> 0110 and 1111 -> [0001]1110, thus: ___abcd.___efgh.___ijkl.___mnop.___qr.__ after 1st "shift left" __abcd..__efgh..__ijkl..__mnop..__qr..__ after 2dn TR A,TBL _abcd..._efgh..._ijkl..._mnop..._qr...__ after 3rd TR A,TBL MVO B.A gets us new zone bit space #### ####_abcd..._efgh..._ijkl..._mnop..._qr...__ MVO A,B aligns 2nd operand for OC "or" ########_abcd..._efgh..._ijkl..._mnop..._qr...__ OC A,B "re-inserts" bits shifted out of lo-nibble into hi-nibble. Note: To mark vacated bits I used underscores and dots in above illustrations to show the effets of UNPK and bit shift. ####_abcdabcdefghefghijklijklmnopmnopqr__qr__ PACK B(8),A(15) removes "duplicates" and chops it up into a useable string ####_abc####defg####hijk####lmno####pqr__ result: | 0abc | defg | hjik | lmno | pqr0 | .... The final OC does the append. I got carried away... I hope you like it although it is an alternative to register shift loops, it isn't obvious (to me!) that it is better in any way... Andreas Geissbuehler
