Peter,
I'm too young to know how this has come into existence.
I do know how I explain this to students, though.
1) the machine instructions were architected for machine use
2) the assembler instructions are devised for programmer use
For the first two operands I apply these rules-of-thumb:
a) for a register and a storage operand, the register comes first,
followed by the storage operand
b) for operands of equal type (whether two registers or two storage
locations) destination comes before source
I don't doubt there will be exceptions, and some on this list will be
able to name them
without thinking, but these rules have served me and my students pretty
well.
It's not much of an explanation, but it may help.
Kind regards,
Abe Kornelis.
===========
Farley, Peter x23353 schreef op 26-3-2015 om 21:45:
I guess this question is mostly for John Ehrman, but others may have insight as
well.
For the same machine instruction format, there are sometimes two different
HLASM operand orders used for the operands of instructions. For example, LOC
has HLASM operands in order 1,2,3 while STMCH operands are in order 1,3,2 and
the machine instruction operands are in order 1,3,2:
LOC R1,D2(B2),M3 [RSY-b]
'EB' R1 M3 B2 DL2 DH2 'F2'
0 8 12 16 20 32 40 47
STCMH R1,M3,D2(B2) [RSY-b]
'EB' R1 M3 B2 DL2 DH2 '2D'
0 8 12 16 20 32 40 47
Here is a second example, LPD has HLASM order 3,1,2 while MVCOS has HLASM order
1,2,3 and the machine operands are in order 3,1,2:
LPD R3,D1(B1),D2(B2) [SSF]
'C8' R3 '4' B1 D1 B2 D2
0 8 12 16 20 32 36 47
MVCOS D1(B1),D2(B2),R3 [SSF]
'C8' R3 '0' B1 D1 B2 D2
0 8 12 16 20 32 36 47
Am I the only one to whom the inconsistency seems arbitrary? Or am I missing
some salient characteristic that explains the differences?
Peter
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