Even if an instruction is interruptible, it's on interruptible on the CPU it's executing on. Other CPUs can be executing and modifying the same area of storage. Some instructions guarantee block-concurrent access to operands, but for those that do not, it's possible, if not likely, that concurrent executions of such instructions will yield pathological results.
Peace, out. > On Jul 30, 2017, at 20:07, Robert Netzlof <[email protected]> wrote: > >> On 7/30/17, Phil Smith <[email protected]> wrote: >> Charles Mills wrote, in part: >>> The effect of multiple CPUs on a multi-task program is even worse than the >>> load, add, store example above. With two CPUs, it is possible for even >>> single machine instructions to interleave. So if one task executes MVC >>> FOO,=C'Now is the time for all good men to come to the aid of the party' >>> and >>> another CPU executes MVC FOO,=C'The quick brown fox jumps over the lazy >>> dog' >>> it is at least in theory* possible for FOO to end up containing 'Now is >>> the >>> time fox jumps over the lazy dog the aid of the party'. >> >> Mmm...I'm pretty sure a single instruction is still atomic. I'm sure Peter >> Relson or one of the other IBMers will chime in, but it there has to be some >> sort of interlock at some level. And I've debugged plenty of concurrency >> problems, never seen a mixture from a single instruction! >> >> ...phsiii >> > Not sure, but is not MVCL interruptible? > > -- > Bob Netzlof a/k/a Sweet Old Bob
