On Fri, Sep 15, 2017 at 11:20 AM, Tony Harminc <[email protected]> wrote:
> On 15 September 2017 at 11:46, Martin Truebner <[email protected]> > wrote: > > Did they forget BIRC (same as BIC, but the address of the storage is > > relative to branch instruction). > > > > Yes, a table with routine-addresses will most of the time exist in > > storage addressable with a base-register (or an Index-register)- but > > what about the cases where this is not true? > > I don't think they forgot it; I think it's not useful for the scenario > in question. That is, where the branch address is passed in storage > (typically on a stack) from a calling routine. There are far fewer > cases where the address of the branch address would be known at > compile time and be instruction relative. Maybe you can suggest a > realistic use case for this. > What I found interesting is that there is only a 64-bit instruction > (though it has no G in it); there is no 31-bit version. > Well, I guess that IBM figured that saving 4 bytes in the "adcon" wasn't worth the extra decoding. The current addressing mode determines whether the branched to address is a 24, 31, or 64 bit address. As best as I can tell, the excess bits are simply ignored. Like doing a fullword load into a register in 24 bit mode to use as a branch address. The contents of the high order byte are irrelevant and ignored. > > Tony H. > -- UNIX was not designed to stop you from doing stupid things, because that would also stop you from doing clever things. -- Doug Gwyn Maranatha! <>< John McKown
