We do the same.
The relative halfword count is at +2 - so the instruction is 00
It's handy to see where exactly you died. And why.
On 8/6/18, 10:51 AM, "IBM Mainframe Assembler List on behalf of Paul
Gilmartin" <ASSEMBLER-LIST@LISTSERV.UGA.EDU on behalf of
00000014e0e4a59b-dmarc-requ...@listserv.uga.edu> wrote:
On 2018-08-06, at 08:35:57, Ed Jaffe wrote:
> We use 'Jxx *+2' which disturbs no registers and is guaranteed to fail
with an 0C1.
>
I am *not* going to read the PoOps to learn why that "is guaranteed
to fail". I'm merely dismissing it as elitist opaque code. Comments
help only slightly.
> On 8/6/2018 3:10 AM, Jonathan Scott wrote:
>> J *+1 isn't even possible, as the hardware offset for relative
>> addressing is in halfwords.
>>
>> For many years I have been using a conditional TRAP macro which
>> is equivalent to
>> BC cond,*+1
>> but which is coded using LA with an ORG back to change the
>> opcode, to avoid getting an error message. This avoids a branch
>> in the normal case. It is primarily used for integrity and
>> consistency checks, and my recovery routine recognizes this
>> convention and reports it as "TRAP occurred at offset &1 in &2".
>>
John Gilmore has argued, reasonably, in IBM-MAIN, for proper use
of the ABEND macro rather than such flamboyant stunts.
-- gil
