>It might be that some SPIE routines handle the interrupt, >maybe print a message, and then allow it through to the OS.
I vaguely recall someone using DC H'0' followed by a message in a special format to get a tailored error message via a SPIE exit. >I do still remember S0C0 from the 360/91 days, Multiple imprecise interrupt, as I recall. >I wouldn’t have thought of that one. Pretty neat. Not as neat as I thought at the time; see the footnote. -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 ________________________________________ From: IBM Mainframe Assembler List <[email protected]> on behalf of glen herrmannsfeldt <[email protected]> Sent: Monday, August 6, 2018 3:55 PM To: [email protected] Subject: S0C1 Shmuel (Seymour J.) Metz wrote: > No; it is guarantied to generate a program 001 interrupt. > You only get an ABEND S0C1 if there is no SPIE/ESPIE exit. I suspect that some use S0C1 as shorthand, and as you note incorrect, description for program interrupt 1.j It might be that some SPIE routines handle the interrupt, maybe print a message, and then allow it through to the OS. I do still remember S0C0 from the 360/91 days, which doesn’t mean program interrupt 0, though the low bits will be 0000. Dreaded by anyone debugging from a hex dump. > I've written code that distinguished[1] between a S/360 and a S/370 > with a SPIE[2] for codes 1 and 2; the exit assumed that it was a S/370 > if the code was 2. I wouldn’t have thought of that one. Pretty neat.
