Actually, my real point is that XA could have been the transition that got us completely away from "dirty" addresses.
And btw, a 'LLG24' instruction would be nice to have. The total cost of changing GET/PUT/READ/WRITE to using SR/ICM must world-wide represent the waste of dozens of dollars in extra CPU time. sas On Wed, Nov 27, 2019 at 1:16 PM Steve Smith <[email protected]> wrote: > I must fall back on "I know very little about Intel architecture". They > do have different modes, which are actually more involved than just > addressing. I get the impression some of the older ones have been > abandoned. > > They have far less assembler code to worry about carrying forward. > Regardless, I doubt they support backwards compatibility nearly as well as > MVS and family. > > My point is that XA took away 7 bits that were used for various purposes. > Taking all 8 wouldn't have been a lot more painful. > > sas > > On Wed, Nov 27, 2019 at 1:00 PM Tom Marchant < > [email protected]> wrote: > >> On Wed, 27 Nov 2019 12:47:44 -0500, Steve Smith wrote: >> >> >Notwithstanding all the expert opinions, from my point of view, XA would >> >have better gone to 32-bit addressing from the get-go. I don't see the >> >benefit of the amode being part of the address. Seems to me it's been a >> >lot of unnecessary complication, and we might have had twice the address >> >space until the advent of z/Arch. I know very little about Intel >> >architecture, but when 32-bit processors came out, they had 32-bit >> >addressing (at least logically). This is, of course, rather moot now. >> >> Do Intel processors support bimodal addressing? Do their designers >> care about compatibility with existing code? >> >> -- >> Tom Marchant >> > > > -- > sas > -- sas
