A. There is no answer to the question. Instructions no longer have "timing"
in isolation. Because of pipelining and out-of-order execution, with any
luck one of those non-storage instructions takes no time at all. Really,
literally no time at all. You could benchmark a loop, stick an SR into the
middle of it, and have it still run at exactly the same speed.

B. Considering pipelining and so forth, you *might* save more time not by
picking one of the below but rather by giving the CPU a little break between
register references. In other words, do *not* do the usual

SR/XR R3,R3
ICM   R3,...

But rather do

SR/XR R3,R3
Do some other stuff that does not use R3
ICM   R3,...

That's what the compilers do.

(Unless of course, readability and maintainability are important to you --
in which case the latter sequence is a lot more likely to get mucked up by a
future maintainer -- a problem that compilers do not have.)

C. LHI has the advantage that it (1) does not require the arithmetic unit
and (2) does not affect the condition code, which might make the pipeline
logic a little easier on the CPU. (That's why I tend to use LHI -- but I
don't go out of my way. I would not change a working SR into an LHI.)

D. Modern CPUs all have a "shortcut" in the decoder that recognizes the
common methods and treats them all equivalently as "slam a zero into Rn."

Charles


-----Original Message-----
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Schmitt, Michael
Sent: Monday, August 10, 2020 12:13 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Clearing a register

There are many ways to set a register to binary zero. My question is, which
is the most efficient?


  1.  XR Rn,Rn
  2.  SR Rn,RN
  3.  SRA Rn,Rn
  4.  LHI Rn,0
  5.  Other instruction
  6.  Depends on hardware
  7.  Depends on other factors. (What?)
  8.  They are have equal performance
  9.  Method X has worse performance but other advantages. (What?)

____________________________________
Michael Schmitt | DXC.technology
(469) 808-4403 | michael.schm...@dxc.com


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