A CLC/EX or MVC/EX sequence is okay, albeit inefficient, but a TR/EX sequence would be bad news.
-- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 ________________________________________ From: IBM Mainframe Assembler List [[email protected]] on behalf of Wendell Lovewell [[email protected]] Sent: Thursday, November 11, 2021 12:18 PM To: [email protected] Subject: Re: Avoiding SIIS - (Was Base-less macros) Adam & Tony--thanks for the good explanations. >From Tony's explanation concerning moving the TR command to the data area via >LOCTR, can I surmise that it might be counter-productive to do so--that >leaving the TR and EX commands in consecutive memory is more efficient? > Example 2: > PgmConst LOCTR , > TxtTRNull TR 0(*-*,R14),NoNulls > PgmCode LOCTR , > EX R5,TxtTRNull In case anyone else is interested... https://www.ibm.com/support/pages/system/files/inline-files/siis_coding_examples_v2.pdf contains these guidelines: Contains some examples and guidelines: The following are general coding guidelines which should be followed to write well-formed Assembler code. • Don’t mix or interleave in instructions / executable code any data or operands which are the target of store or update operations. • Generate dummy areas of separation in a sufficient length at those locations where instruction and data/operands are adjacent to each other. An Assembler statement of the type: Label DC XL256’00’ can be used to brute force this objective. Of course, there are smarter ways to separate Instruction cache lines from data cache lines based on knowledge of the cache line boundaries. • Guarantee the 4k page alignment of any Assembler load module via the BINDER/LINKAGE Editor control statement PAGE: //LKED.SYSIN DD * PAGE DRIVER NAME DRIVER(R) • Where possible write to a re-entrant standard. Thanks again, Wendell
