> using BCTR R14,0 rather than the LARL? It's shorter, but is a suppressed branch.
I think modern Z chips are smart enough to "know" that those ,0 branch instructions are always instruction-sequence no-ops. Charles -----Original Message----- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Seymour J Metz Sent: Thursday, November 25, 2021 6:32 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: Base-less macros It could be shorter, and B BRTAB(R15) is not baseless. How about CIJL R15,0,RC_MINUS CIJH R15,MAXRC,RC_GT_MAX LARL R14,BRTAN B 0(R14,R15) How does the performance compare using BCTR R14,0 rather than the LARL? It's shorter, but is a suppressed branch. -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 ________________________________________ From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf of Jeremy Schwartz [0000115e2ee20c83-dmarc-requ...@listserv.uga.edu] Sent: Wednesday, November 24, 2021 8:44 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: Base-less macros Here's another form of branch table combining compare and branches. Just thought it was interesting and one reason why I love assembler. So many possibilities. XR R0,R0 INCREMENT = 0 LR R1,R0 BCTR R1,0 SET COMPARE = -1 JXLE R15,R0,LBL_RC_MINUS Label taken if <= -1 LA R1,MAX_RC SET COMPARE = MAX_RC JXH R15,R0,LBL_RC_GT_MAX Label taken if > MAX_RC B BRTAB(R15) BRTAB DS 0H J LABEL_RC0 J LABEL_RC4 J LABEL_RC8 J LABEL_RC12
