Actually, and I haven't looked, I suspect that there is room in the actual (new 
proposed FILLI) machine instruction for both an immediate value and a zero to 
256 length

> -----Original Message-----
> From: IBM Mainframe Assembler List <ASSEMBLER-
> [email protected]> On Behalf Of Tom Harper
> Sent: Friday, April 15, 2022 10:11 AM
> To: [email protected]
> Subject: Re: Next instruction needed
> 
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> For a fixed length move, none. For a variable length move, one.
> 
> Sent from my iPhone
> 
> > On Apr 15, 2022, at 12:27 PM, Robin Vowels <[email protected]>
> wrote:
> >
> > On 2022-04-16 02:23, Tom Harper wrote:
> >>>> On Apr 15, 2022, at 12:20 PM, Robin Vowels <[email protected]>
> wrote:
> >>> On 2022-04-16 00:25, Tom Harper wrote:
> >>>> Well known. But the instruction I’m proposing has no registers
> >>>> involved
> >>> Oh?  How do you propose that such an instruction move
> >>> N bytes (where N is variable) without the value of N
> >>> being in a register?
> >> As mentioned, R0.
> >
> > Make up your mind!  You just said that no registers were involved.
> >
> >>>> (other than base displacement) and thus there is no way to
> >>>> restart the instruction to complete the process.
> >>>> So to avoid that, limiting it to 256 bytes removed that as an issue.
> >>>>>> On Apr 15, 2022, at 9:45 AM, Seymour J Metz <[email protected]>
> wrote:
> >>>>> You can have interruptability without an arbitrary length restriction;
> CLCL and MVCL work just fine. All that you need is that the instruction be
> resumeable and for the hardware/microcode/millicode to periodically check
> for pending interrupts and update the registers as needed
> 
> 
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