Ok, I had to read the manual (PoOp), to see how LPR and LCR actually work
and the OP probably should post the definitions of ccpm and carrybit.
LPR: if the register contains 0x80000000, IMO the result will be zero
(and overflow),
so you're right ... this will lead to a zero result. IMO, the overflow
will be ignored.
That is:
N result zero: LPR ... LCR ... SRL puts x'00' in R1
N result X'80000000': LPR overflow (zero) ... LCR ... SRL puts x'00' in R1
N result otherwise non-zero: LPR non-zero positive ... LCR negative ...
SRL puts x'01' in R1
For further analysis, we need the definitions of ccpm and carrybit.
Maybe the coding is indeed wrong, and maybe we can find some values for
ccpm and carrybit, where the N result is X'80000000' ... if ccpm and
carrybit
are signed ints, they must both be negative.
Is bitwise AND defined for signed ints, which are negative?
IMO, this is difficult; the result depends on the number format (2s or
1s complement).
So, maybe, this is not defined in the C language; bit operations are for
unsigned ints, normally.
Anyway:
unsigned int ccpm, carrybit;
ccpm = 0x80000001u;
carrybit = 0x80000002u;
bool overflow = (ccpm & carrybit) != 0;
this would fail, IMO, given the machine instructions below.
Kind regards
Bernd
Am 20.04.2022 um 01:24 schrieb Paul Gilmartin:
On Apr 19, 2022, at 16:59:54, Bernd Oppolzer <bernd.oppol...@t-online.de> wrote:
The solution LPR ... LCR ... SRL looks OK for me.
LPR keeps a nonzero result, but with a positive sign,
What does this do for an operand of 0x80000000?
LCR does the same, but enforces a negative sign,
So the sigh bit unconditionally 1.
and SRL moves the sign to the rightmost bit position.
Unconditionally 1
What am I miissing?
Am 19.04.2022 um 15:06 schrieb Ian Worthington:
Noticed today that the GCC C compiler generated an unexpected sequence of
instructions for an AND and TEST:
**** bool overflow = (ccpm & carrybit) != 0; // check if carry bit set
109 .loc 1 189 0
110 0078 5810B25C l %r1,604(%r11) # D.7949, ccpm
111 007c 5410B26C n %r1,620(%r11) # D.7949, carrybit
112 0080 1011 lpr %r1,%r1 # tmp54, D.7949
113 0082 1311 lcr %r1,%r1 # tmp55, tmp54
114 0084 8810001F srl %r1,31 # tmp56,
115 0088 4210B25B stc %r1,603(%r11) # tmp56, overflow
