I “grew up” using XR, but most of the code at my current employer (written by someone who was a better programmer than I’ll ever be) uses SLR (or SLGR). The only time I use LHI is to preserve a condition code.
Mark (sent from my iPhone) > On Nov 15, 2023, at 08:44, Seymour J Metz <[email protected]> wrote: > > > > My guess would be any of the RR options: SLR, SR, XR. That's less of a cache > hit than, e.g., LA, LHI. > > > > > -- > Shmuel (Seymour J.) Metz > http://mason.gmu.edu/~smetz3 > עַם יִשְׂרָאֵל חַי > > > > ________________________________________ > From: IBM Mainframe Assembler List <[email protected]> on > behalf of João Reginato <[email protected]> > Sent: Wednesday, November 15, 2023 8:44 AM > To: [email protected] > Subject: Re: ASMA057E Undefined operation code SR 15,15 > > so, changing the subject, tell us, what is the best choice for zeroing a > register? > xr, la, or the 3rd one? > >> Em qua., 15 de nov. de 2023 às 10:39, Peter Relson <[email protected]> >> escreveu: >> >> This was a very lengthy thread in which the OP multiple times ignored >> those who correctly provided what was needed. I don't know why the OP would >> not simply take the advice and proceed. >> >> The error has nothing to do with "label", although the lack of allowing >> "label" is not typically good. The operand was not specified in column 1. >> >> As was mentioned, the single macro variable was treated as "the opcode". >> There is no "opcode" of "SR 15,15". That is the way assembler macro >> substitution works. Should it? Maybe not, but history and compatibility >> demand that it not be changed. >> >> All of the approaches demonstrated in the macro below work: >> MACRO >> ZERO &N >> SR &N,&N >> &OPCODE SETC 'SR' >> &OPERAND SETC '&N' >> SR &OPERAND,&OPERAND >> &OPCODE &OPERAND,&OPERAND >> &OPERANDS SETC '&N,&N' >> &OPCODE &OPERANDS >> MEND >> >> And then add support for a label for better usability. >> >> (I think older releases of the assembler used to require &LCLC for each >> SETC symbol, but apparently that is no longer required.) >> >> I saw no mention that "SR" is at best the 4th best choice for zeroing a >> register. I'll leave the other 3 (and perhaps more) as an exercise for the >> reader, for a while. >> >> Peter Relson >> z/OS Core Technology Design >>
