Am 16.10.2017 um 21:55 schrieb Ben Greear:
On 10/16/2017 12:12 PM, Adrian Chadd wrote:
hiya,
I'd honestly rather see firmware changes for wave 2 chips, as I know
there's a lot more MAC changes messing up this stuff ..
For wave-1, it appears to be quite simple to modify the firmware to set
the ack-cts register to a specific value (and re-set it after scanning,
etc).
Is the wave-2 stuff that much different? I've recently hooked in my
CT firmware for wave-1 to support the driver's ack/cts calculations
(but without needing all the manual register twiddling). I could
probably
do the same for 9984 if it mattered. But, that still doesn't help stock
driver/firmware users.
wave 2 has nothing todo with wave 1. the registers are different
Thanks,
Ben
-adrian
On 16 October 2017 at 12:10, Sebastian Gottschall
<[email protected]> wrote:
Am 16.10.2017 um 19:59 schrieb Adrian Chadd:
On 16 October 2017 at 10:57, Ben Greear <[email protected]>
wrote:
On 08/25/2016 06:25 AM, Benjamin Berg wrote:
Unfortunately ath10k does not generally allow modifying the coverage
class
with the stock firmware and Qualcomm has so far refused to implement
this
feature so that it can be properly supported in ath10k. If we
however
know
the registers that need to be modified for proper operation with a
higher
coverage class, then we can do these modifications from the driver.
This patch implements this hack for first generation cards which are
based
on a core that is similar to ath9k. The registers are modified in
place
and
need to be re-written every time the firmware sets them. To
achieve this
the register status is verified after certain WMI events from the
firmware.
The coverage class may not be modified temporarily right after
the card
re-initializes the registers. This is for example the case during
scanning.
Thanks to Sebastian Gottschall <[email protected]> for
initially
working on a userspace support for this. This patch wouldn't have
been
possible without this documentation.
Hello,
Do you happen to know the maximum distance that can work with this
patch enabled? The register value maximum seems to be 0x3FFF, but I
am not sure of the units (nor how exactly that applies to distance).
It's in MAC clocks still, right? So it depends on how fast the MAC
clock timer runs.
-adrian
if someone is interested i can provide a patch witch works as well
for 998x
and 9984 and usually other newer chipsets too.
but clock parameters need to be adjusted for these newer ones. the only
problem is that its based on unoffical registers which arent
documented and
the patch for the 99xx chipsets is very different from 988x
--
Mit freundlichen Grüssen / Regards
Sebastian Gottschall / CTO
NewMedia-NET GmbH - DD-WRT
Firmensitz: Stubenwaldallee 21a, 64625 Bensheim
Registergericht: Amtsgericht Darmstadt, HRB 25473
Geschäftsführer: Peter Steinhäuser, Christian Scheele
http://www.dd-wrt.com
email: [email protected]
Tel.: +496251-582650 / Fax: +496251-5826565
_______________________________________________
ath10k mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/ath10k
--
Mit freundlichen Grüssen / Regards
Sebastian Gottschall / CTO
NewMedia-NET GmbH - DD-WRT
Firmensitz: Stubenwaldallee 21a, 64625 Bensheim
Registergericht: Amtsgericht Darmstadt, HRB 25473
Geschäftsführer: Peter Steinhäuser, Christian Scheele
http://www.dd-wrt.com
email: [email protected]
Tel.: +496251-582650 / Fax: +496251-5826565
_______________________________________________
ath10k mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/ath10k
