Sure, here's what's going on: * There's a PCI bus reset. It's a pin. On the PCI bus. * The BIOS can yank that down to reset all the devices. * There's timing requirements for how long that pin can be pulled down to reset and release. * After the PCI bus is reset, the atheros MAC initialises the PCI space by reading a bunch of values from EEPROM/OTP and writing them into the register space. Most of these are PCI space registers but there can be others. * Some vendors do daft things, like multiple quick PCI bus resets back-to-back rather than doing a reset and waiting for whatever the standard requires or the best practice is; or just asserting reset quickly rather than holding it down for the required time is; * .. and this can interrupt / confuse the MAC during this whole register initialisation path.
So, the "quick" fix is to re-reset the PCI slot or the PCI bus. But I think that requires you to take care of PCI device resource allocation and enumeration; which the Linux kernel may or may not do. For cardbus/expresscard devices there's some resource allocation going on, but not necessarily for always-attached cards. The real fix is to smack the heck out of BIOS writers who do strange and wonderful crap in their BIOS when resetting and enumerating PCI devices. Adrian _______________________________________________ ath9k-devel mailing list ath9k-devel@lists.ath9k.org https://lists.ath9k.org/mailman/listinfo/ath9k-devel
