On 6/8/2010 10:31 AM, Bob Paddock wrote:
There are several places that handle SP adjustment:
avr.c: output_movhi, expand_prologue, expand_epilogue
avr.md: movhi_sp_r_irq_off, movhi_sp_r_irq_on (both generated in
epilogue/prologue)
libgcc.S: __prologue_saves__, __epilogue_restores__
For changes in libgcc.S to take effect, appropriate builtin-defines must
be provided so that the right multilib variants will be generated.
When I was patching my libgcc.a for the avrxmega7 lib, the only place
that I saw, that turned off the IRQs were the epilogue/prologue.
Is there some reason they don't need turned off in the other contexts?
Seems like such a problem would have shown up long before now?
So here's what I have found so far. When executing SEI, one more
instruction can execute before the first interrupt is serviced. When
enabling interrupts by restoring the status register, interrupts can
occur immediately. When writing to SPL, interrupts are automatically
disabled until the next memory write (up to 4 cycles).
Therefore, the prologue and epilogue do not need to disable interrupts
at all. A write to SPL followed by a write to SPH should be interrupt
safe. I have not tested this yet.
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