From: Jan Luebbe <[email protected]>
Signed-off-by: Jan Luebbe <[email protected]>
Signed-off-by: Sascha Hauer <[email protected]>
---
arch/arm/cpu/cpuinfo.c | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/cpu/cpuinfo.c b/arch/arm/cpu/cpuinfo.c
index 8aea4b4..260d47b 100644
--- a/arch/arm/cpu/cpuinfo.c
+++ b/arch/arm/cpu/cpuinfo.c
@@ -31,6 +31,12 @@
#define CPU_ARCH_ARMv6 8
#define CPU_ARCH_ARMv7 9
+#define ARM_CPU_PART_CORTEX_A5 0xC050
+#define ARM_CPU_PART_CORTEX_A7 0xC070
+#define ARM_CPU_PART_CORTEX_A8 0xC080
+#define ARM_CPU_PART_CORTEX_A9 0xC090
+#define ARM_CPU_PART_CORTEX_A15 0xC0F0
+
static void decode_cache(unsigned long size)
{
int linelen = 1 << ((size & 0x3) + 3);
@@ -154,6 +160,33 @@ static int do_cpuinfo(int argc, char *argv[])
printf("implementer: %s\narchitecture: %s\n",
implementer, architecture);
+ if (cpu_arch == CPU_ARCH_ARMv7) {
+ unsigned int major, minor;
+ char *part;
+ major = (mainid >> 20) & 0xf;
+ minor = mainid & 0xf;
+ switch (mainid & 0xfff0) {
+ case ARM_CPU_PART_CORTEX_A5:
+ part = "Cortex-A5";
+ break;
+ case ARM_CPU_PART_CORTEX_A7:
+ part = "Cortex-A7";
+ break;
+ case ARM_CPU_PART_CORTEX_A8:
+ part = "Cortex-A8";
+ break;
+ case ARM_CPU_PART_CORTEX_A9:
+ part = "Cortex-A9";
+ break;
+ case ARM_CPU_PART_CORTEX_A15:
+ part = "Cortex-A15";
+ break;
+ default:
+ part = "unknown";
+ }
+ printf("core: %s r%up%u\n", part, major, minor);
+ }
+
if (cache & (1 << 24)) {
/* separate I/D cache */
printf("I-cache: ");
--
1.8.4.rc3
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