The clock frequency property of the device tree node fsl,mpic is added as it is needed by the PCI driver to function in newer Linux version.
Signed-off-by: Renaud Barbier <[email protected]> --- arch/ppc/mach-mpc85xx/fdt.c | 5 +++++ arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h | 3 +++ 2 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/ppc/mach-mpc85xx/fdt.c b/arch/ppc/mach-mpc85xx/fdt.c index fd919a5..b1da144 100644 --- a/arch/ppc/mach-mpc85xx/fdt.c +++ b/arch/ppc/mach-mpc85xx/fdt.c @@ -132,6 +132,11 @@ static int fdt_cpu_setup(struct device_node *blob, void *unused) node = of_find_compatible_node(node, NULL, "ns16550"); } + node = of_find_compatible_node(blob, NULL, "fsl,mpic"); + if (node) + of_property_write_u32(node, "clock-frequency", + sysinfo.freqSystemBus); + fdt_stdout_setup(blob); return 0; diff --git a/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h b/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h index ff3a312..d5a9c97 100644 --- a/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h +++ b/arch/ppc/mach-mpc85xx/include/mach/immap_85xx.h @@ -158,5 +158,8 @@ #define I2C1_BASE_ADDR (CFG_IMMR + 0x3000) #define I2C2_BASE_ADDR (CFG_IMMR + 0x3100) +/* Global Timer Registers */ +#define MPC8xxx_PIC_TFRR_OFFSET 0x10F0 + #define PCI1_BASE_ADDR (CFG_IMMR + MPC85xx_PCI1_OFFSET) #endif /*__IMMAP_85xx__*/ -- 1.7.1 _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
