Signed-off-by: Sascha Hauer <[email protected]>
---
arch/arm/boards/pcm051/board.c | 17 ++---------------
arch/arm/dts/am335x-phytec-phycore.dts | 18 +++++++++++++++++-
2 files changed, 19 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boards/pcm051/board.c b/arch/arm/boards/pcm051/board.c
index 4b76f4c..a64d219 100644
--- a/arch/arm/boards/pcm051/board.c
+++ b/arch/arm/boards/pcm051/board.c
@@ -47,26 +47,13 @@ static int pcm051_devices_init(void)
switch (bootsource_get()) {
case BOOTSOURCE_SPI:
- devfs_add_partition("m25p0", 0x00000, SZ_128K,
- DEVFS_PARTITION_FIXED, "xload");
- devfs_add_partition("m25p0", SZ_128K, SZ_512K,
- DEVFS_PARTITION_FIXED, "self0");
- devfs_add_partition("m25p0", SZ_128K + SZ_512K, SZ_128K,
- DEVFS_PARTITION_FIXED, "env0");
+ of_device_enable_path("/chosen/environment-spi");
break;
case BOOTSOURCE_MMC:
omap_set_bootmmc_devname("mmc0");
break;
default:
- devfs_add_partition("nand0", 0x00000, SZ_128K,
- DEVFS_PARTITION_FIXED, "xload_raw");
- dev_add_bb_dev("xload_raw", "xload");
- devfs_add_partition("nand0", SZ_512K, SZ_512K,
- DEVFS_PARTITION_FIXED, "self_raw");
- dev_add_bb_dev("self_raw", "self0");
- devfs_add_partition("nand0", SZ_512K + SZ_512K, SZ_128K,
- DEVFS_PARTITION_FIXED, "env_raw");
- dev_add_bb_dev("env_raw", "env0");
+ of_device_enable_path("/chosen/environment-nand");
break;
}
diff --git a/arch/arm/dts/am335x-phytec-phycore.dts
b/arch/arm/dts/am335x-phytec-phycore.dts
index 8fbfae6..81c08fd 100644
--- a/arch/arm/dts/am335x-phytec-phycore.dts
+++ b/arch/arm/dts/am335x-phytec-phycore.dts
@@ -6,6 +6,22 @@
model = "Phytec phyCORE AM335x";
compatible = "phytec,phycore-am335x", "ti,am33xx";
+ chosen {
+ linux,stdout-path = &uart0;
+
+ environment-spi {
+ compatible = "barebox,environment";
+ device-path = &flash, "partname:bareboxenv";
+ status = "disabled";
+ };
+
+ environment-nand {
+ compatible = "barebox,environment";
+ device-path = &nand, "partname:bareboxenv";
+ status = "disabled";
+ };
+ };
+
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
@@ -211,7 +227,7 @@
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
- nand@0,0 {
+ nand: nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8-romcode";
--
1.8.4.2
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