Aliases and clocks are needed to support the i.MX53 PWMs.
Signed-off-by: Sascha Hauer <[email protected]>
---
arch/arm/dts/imx53.dtsi | 7 +++++++
arch/arm/mach-imx/clk-imx5.c | 4 ++++
2 files changed, 11 insertions(+)
diff --git a/arch/arm/dts/imx53.dtsi b/arch/arm/dts/imx53.dtsi
index 9a766da..bc68012 100644
--- a/arch/arm/dts/imx53.dtsi
+++ b/arch/arm/dts/imx53.dtsi
@@ -1 +1,8 @@
#include <arm/imx53.dtsi>
+
+/ {
+ aliases {
+ pwm0 = &pwm1;
+ pwm1 = &pwm2;
+ };
+};
diff --git a/arch/arm/mach-imx/clk-imx5.c b/arch/arm/mach-imx/clk-imx5.c
index 9d536bc..8146359 100644
--- a/arch/arm/mach-imx/clk-imx5.c
+++ b/arch/arm/mach-imx/clk-imx5.c
@@ -209,6 +209,8 @@ int __init mx51_clocks_init(void __iomem *regs, unsigned
long rate_ckil, unsigne
clkdev_add_physbase(clks[IMX5_CLK_ESDHC_C_SEL],
MX51_MMC_SDHC3_BASE_ADDR, NULL);
clkdev_add_physbase(clks[IMX5_CLK_ESDHC_D_SEL],
MX51_MMC_SDHC4_BASE_ADDR, NULL);
clkdev_add_physbase(clks[IMX5_CLK_IPG], MX51_ATA_BASE_ADDR, NULL);
+ clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX51_PWM1_BASE_ADDR,
"per");
+ clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX51_PWM2_BASE_ADDR,
"per");
return 0;
}
@@ -272,6 +274,8 @@ int __init mx53_clocks_init(void __iomem *regs, unsigned
long rate_ckil, unsigne
clkdev_add_physbase(clks[IMX5_CLK_ESDHC_B_PODF], MX53_ESDHC3_BASE_ADDR,
NULL);
clkdev_add_physbase(clks[IMX5_CLK_ESDHC_D_SEL], MX53_ESDHC4_BASE_ADDR,
NULL);
clkdev_add_physbase(clks[IMX5_CLK_AHB], MX53_SATA_BASE_ADDR, NULL);
+ clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX53_PWM1_BASE_ADDR,
"per");
+ clkdev_add_physbase(clks[IMX5_CLK_PER_ROOT], MX53_PWM2_BASE_ADDR,
"per");
return 0;
}
--
2.0.0.rc0
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