Those 3 are needed to power CPU0 from the CPUG cluster.

Signed-off-by: Lucas Stach <[email protected]>
---
 arch/arm/mach-tegra/include/mach/tegra20-pmc.h |  4 ++++
 arch/arm/mach-tegra/tegra_avp_init.c           | 24 ++++++++++++++++++------
 2 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-tegra/include/mach/tegra20-pmc.h 
b/arch/arm/mach-tegra/include/mach/tegra20-pmc.h
index 3a05e0f..30ac065 100644
--- a/arch/arm/mach-tegra/include/mach/tegra20-pmc.h
+++ b/arch/arm/mach-tegra/include/mach/tegra20-pmc.h
@@ -66,4 +66,8 @@
 #define PMC_PWRGATE_STATUS_TD          (1 << 1)
 #define PMC_PWRGATE_STATUS_CPU         (1 << 0)
 
+#define PMC_PARTID_CRAIL               0
+#define PMC_PARTID_CE0                 14
+#define PMC_PARTID_C0NC                        15
+
 #define PMC_SCRATCH(i)                 (0x050 + 0x4*i)
diff --git a/arch/arm/mach-tegra/tegra_avp_init.c 
b/arch/arm/mach-tegra/tegra_avp_init.c
index cc8b0e2..3d21963 100644
--- a/arch/arm/mach-tegra/tegra_avp_init.c
+++ b/arch/arm/mach-tegra/tegra_avp_init.c
@@ -197,26 +197,38 @@ static void start_cpu0_clocks(void)
        tegra_ll_delay_usec(300);
 }
 
-static void maincomplex_powerup(void)
+static void power_up_partition(u32 partid)
 {
        u32 reg;
 
-       if (!(readl(TEGRA_PMC_BASE + PMC_PWRGATE_STATUS) &
-             PMC_PWRGATE_STATUS_CPU)) {
-               writel(PMC_PWRGATE_TOGGLE_START | PMC_PWRGATE_TOGGLE_PARTID_CPU,
+       if (!(readl(TEGRA_PMC_BASE + PMC_PWRGATE_STATUS) & (1 << partid))) {
+               writel(PMC_PWRGATE_TOGGLE_START | partid,
                       TEGRA_PMC_BASE + PMC_PWRGATE_TOGGLE);
 
                while (!(readl(TEGRA_PMC_BASE + PMC_PWRGATE_STATUS) &
-                        PMC_PWRGATE_STATUS_CPU));
+                       (1 << partid)));
 
                reg = readl(TEGRA_PMC_BASE + PMC_REMOVE_CLAMPING_CMD);
-               reg |= PMC_REMOVE_CLAMPING_CMD_CPU;
+               reg |= (1 << partid);
                writel(reg, TEGRA_PMC_BASE + PMC_REMOVE_CLAMPING_CMD);
 
                tegra_ll_delay_usec(1000);
        }
 }
 
+static void maincomplex_powerup(void)
+{
+       /* main cpu rail */
+       power_up_partition(PMC_PARTID_CRAIL);
+
+       if (tegra_get_chiptype() >= TEGRA114) {
+               /* fast cluster uncore part */
+               power_up_partition(PMC_PARTID_C0NC);
+               /* fast cluster cpu0 part */
+               power_up_partition(PMC_PARTID_CE0);
+       }
+}
+
 static void tegra_cluster_switch_hp(void)
 {
        u32 reg;
-- 
1.9.3


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