I would suggest replacing the "u8 where" (in pci_read/write_config and others) by "int where" to allow future access to PCIe extended configuration space (up to offset 0x1000).+int +pci_read_config_byte(struct pci_dev *dev, u8 where, u8 *val) +{ + return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val); +} + +int +pci_read_config_word(struct pci_dev *dev, u8 where, u16 *val) +{ + return pci_bus_read_config_word(dev->bus, dev->devfn, where, val); +} + +int +pci_read_config_dword(struct pci_dev *dev, u8 where, u32 *val) +{ + return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val); +} + +int +pci_write_config_byte(struct pci_dev *dev, u8 where, u8 val) +{ + return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val); +} + +int +pci_write_config_word(struct pci_dev *dev, u8 where, u16 val) +{ + return pci_bus_write_config_word(dev->bus, dev->devfn, where, val); +} + +int +pci_write_config_dword(struct pci_dev *dev, u8 where, u32 val) +{ + return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); +}
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