implement v8_flush_dcache_range based on v8_inv_dcache_range. While
at it add a prototype for v8_inv_dcache_range.
Signed-off-by: Sascha Hauer <s.ha...@pengutronix.de>
---
arch/arm/cpu/cache-armv8.S | 19 +++++++++++++++++++
arch/arm/include/asm/cache.h | 2 ++
2 files changed, 21 insertions(+)
diff --git a/arch/arm/cpu/cache-armv8.S b/arch/arm/cpu/cache-armv8.S
index 82b2f81778..3e21b35913 100644
--- a/arch/arm/cpu/cache-armv8.S
+++ b/arch/arm/cpu/cache-armv8.S
@@ -148,6 +148,25 @@ ENTRY(v8_flush_dcache_range)
ret
ENDPROC(v8_flush_dcache_range)
+.section .text.v8_inv_dcache_range
+ENTRY(v8_inv_dcache_range)
+ mrs x3, ctr_el0
+ lsr x3, x3, #16
+ and x3, x3, #0xf
+ mov x2, #4
+ lsl x2, x2, x3 /* cache line size */
+
+ /* x2 <- minimal cache line size in cache system */
+ sub x3, x2, #1
+ bic x0, x0, x3
+1: dc ivac, x0 /* invalidate data or unified cache */
+ add x0, x0, x2
+ cmp x0, x1
+ b.lo 1b
+ dsb sy
+ ret
+ENDPROC(v8_inv_dcache_range)
+
/*
* void v8_invalidate_icache_all(void)
*
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index 406a9d5d99..503bf8a0f7 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -5,6 +5,8 @@
extern void v8_invalidate_icache_all(void);
void v8_flush_dcache_all(void);
void v8_invalidate_dcache_all(void);
+void v8_flush_dcache_range(unsigned long start, unsigned long end);
+void v8_inv_dcache_range(unsigned long start, unsigned long end);
#endif
static inline void icache_invalidate(void)
--
2.16.1
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