From: Enrico Jorns <[email protected]>
Signed-off-by: Enrico Jorns <[email protected]>
---
arch/arm/dts/socfpga_arria10_achilles.dts | 90 +++++++++++++++++++++++
1 file changed, 90 insertions(+)
diff --git a/arch/arm/dts/socfpga_arria10_achilles.dts
b/arch/arm/dts/socfpga_arria10_achilles.dts
index c03982ef5672..fc75afc79516 100644
--- a/arch/arm/dts/socfpga_arria10_achilles.dts
+++ b/arch/arm/dts/socfpga_arria10_achilles.dts
@@ -23,6 +23,7 @@
aliases {
serial0 = &uart0;
+ state = &state;
};
chosen {
@@ -40,6 +41,90 @@
reg = <0x0 0xc0000000>;
};
+ state: state {
+ magic = <0x4d433230>;
+ compatible = "barebox,state";
+ backend-type = "raw";
+ backend = <&state_mmc>;
+ backend-stridesize = <1024>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ bootstate {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ system0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ remaining_attempts {
+ reg = <0x0 0x4>;
+ type = "uint32";
+ default = <3>;
+ };
+ priority {
+ reg = <0x4 0x4>;
+ type = "uint32";
+ default = <20>;
+ };
+ };
+
+ system1 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ remaining_attempts {
+ reg = <0x10 0x4>;
+ type = "uint32";
+ default = <3>;
+ };
+ priority {
+ reg = <0x14 0x4>;
+ type = "uint32";
+ default = <20>;
+ };
+ };
+ factory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ remaining_attempts {
+ reg = <0x20 0x4>;
+ type = "uint32";
+ default = <3>;
+ };
+ priority {
+ reg = <0x24 0x4>;
+ type = "uint32";
+ default = <10>;
+ };
+ };
+ last_chosen {
+ reg = <0x2C 0x4>;
+ type = "uint32";
+ };
+ };
+ };
+
+ bootstate: bootstate {
+ compatible = "barebox,bootstate";
+ backend-type = "state"; // or "nv", or "efivar"
+ backend = <&state>;
+
+ system0 {
+ default_attempts = <3>;
+ };
+
+ system1 {
+ default_attempts = <3>;
+ };
+
+ factory {
+ default_attempts = <3>;
+ };
+ };
+
soc {
clkmgr@ffd04000 {
clocks {
@@ -120,6 +205,11 @@
label = "environment";
reg = <0x178000 0x8000>;
};
+
+ state_mmc: partition@180000 {
+ label = "state";
+ reg = <0x180000 0xC00>;
+ };
};
&uart0 {
--
2.19.0
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