The Cortex-A7 in both the i.MX6UL[1] and i.MX6ULL[2] is affected by the errata ERR008958 "Arm/MP: 814220—B-Cache maintenance by set/way operations can execute out of order".
select ARM_ERRATA_814220 to address this. [1]: https://www.nxp.com/docs/en/errata/IMX6ULCE.pdf [2]: https://www.nxp.com/docs/en/errata/IMX6ULLCE.pdf Signed-off-by: Ahmad Fatoum <[email protected]> --- arch/arm/mach-imx/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index d47dd3547712..b15e6dfdfd9b 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -164,6 +164,7 @@ config ARCH_IMX6SX config ARCH_IMX6UL bool select ARCH_IMX6 + select ARM_ERRATA_814220 config ARCH_IMX7 bool -- 2.20.1 _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
