Added the configuration for FPGA an PCAP clock control
Signed-off-by: Michael Graichen <michael.graic...@hotmail.com>
---
arch/arm/boards/avnet-zedboard/lowlevel.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boards/avnet-zedboard/lowlevel.c
b/arch/arm/boards/avnet-zedboard/lowlevel.c
index 6f05d934c..b8001fcf6 100644
--- a/arch/arm/boards/avnet-zedboard/lowlevel.c
+++ b/arch/arm/boards/avnet-zedboard/lowlevel.c
@@ -276,6 +276,15 @@ static void avnet_zedboard_ps7_init(void)
writel(0x00000001, 0xf8000B00);
+ /* FPGA Clock Control */
+ writel(0x00101400, 0xf8000170);
+ writel(0x00101400, 0xf8000180);
+ writel(0x00101400, 0xf8000190);
+ writel(0x00101400, 0xf80001a0);
+
+ /* PCAP Clock Control */
+ writel(0x00000501, 0xf8000168);
+
/* lock up. secure, secure */
writel(0x0000767B, ZYNQ_SLCR_LOCK);
}
--
2.17.1
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