Remove OP-TEE from the CACHED mapping to preserve the XN bit set in the default mapping. This should ensure that the Cortex-A7 does not try to speculate into secure world memory.
Signed-off-by: Rouven Czerwinski <[email protected]> --- arch/arm/cpu/mmu-early.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/cpu/mmu-early.c b/arch/arm/cpu/mmu-early.c index b985aa455f..a480cd7707 100644 --- a/arch/arm/cpu/mmu-early.c +++ b/arch/arm/cpu/mmu-early.c @@ -3,6 +3,7 @@ #include <errno.h> #include <linux/sizes.h> #include <asm/memory.h> +#include <asm-generic/memory_layout.h> #include <asm/system.h> #include <asm/cache.h> #include <asm-generic/sections.h> @@ -55,6 +56,10 @@ void mmu_early_enable(unsigned long membase, unsigned long memsize, */ map_region((unsigned long)_stext, _etext - _stext, PMD_SECT_DEF_UNCACHED); + /* In case we might early load OP-TEE, remove it from the MMU mapping */ + if(IS_ENABLED(CONFIG_PBL_OPTEE)) + memsize -= OPTEE_SIZE; + /* maps main memory as cachable */ map_region(membase, memsize, PMD_SECT_DEF_CACHED); -- 2.28.0 _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
