From: Sam Ravnborg <[email protected]> This adds support for an older SKOV board, the arm9cpu.
Signed-off-by: Sam Ravnborg <[email protected]> Signed-off-by: Ulrich Ölmann <[email protected]> Signed-off-by: Sascha Hauer <[email protected]> --- arch/arm/boards/Makefile | 1 + arch/arm/boards/skov-arm9cpu/Makefile | 2 + arch/arm/boards/skov-arm9cpu/board.c | 84 +++++ arch/arm/boards/skov-arm9cpu/lowlevel.c | 127 +++++++ arch/arm/configs/at91_multi_defconfig | 1 + arch/arm/dts/Makefile | 1 + arch/arm/dts/at91-skov-arm9cpu.dts | 453 ++++++++++++++++++++++++ arch/arm/mach-at91/Kconfig | 11 + images/Makefile.at91 | 5 + 9 files changed, 685 insertions(+) create mode 100644 arch/arm/boards/skov-arm9cpu/Makefile create mode 100644 arch/arm/boards/skov-arm9cpu/board.c create mode 100644 arch/arm/boards/skov-arm9cpu/lowlevel.c create mode 100644 arch/arm/dts/at91-skov-arm9cpu.dts diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index 9ccb75e27b..dc55d7852c 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -178,3 +178,4 @@ obj-$(CONFIG_MACH_WAGO_PFC_AM35XX) += wago-pfc-am35xx/ obj-$(CONFIG_MACH_LS1046ARDB) += ls1046ardb/ obj-$(CONFIG_MACH_TQMLS1046A) += tqmls1046a/ obj-$(CONFIG_MACH_MNT_REFORM) += mnt-reform/ +obj-$(CONFIG_MACH_SKOV_ARM9CPU) += skov-arm9cpu/ diff --git a/arch/arm/boards/skov-arm9cpu/Makefile b/arch/arm/boards/skov-arm9cpu/Makefile new file mode 100644 index 0000000000..01c7a259e9 --- /dev/null +++ b/arch/arm/boards/skov-arm9cpu/Makefile @@ -0,0 +1,2 @@ +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/skov-arm9cpu/board.c b/arch/arm/boards/skov-arm9cpu/board.c new file mode 100644 index 0000000000..8d5eadbb9a --- /dev/null +++ b/arch/arm/boards/skov-arm9cpu/board.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0+ +// SPDX-FileCopyrightText: 2017 Sam Ravnborg <[email protected]> + +#include <common.h> +#include <globalvar.h> +#include <magicvar.h> +#include <envfs.h> +#include <init.h> +#include <gpio.h> + +#include <linux/sizes.h> + +#include <mach/at91sam9263_matrix.h> +#include <mach/at91sam9_sdramc.h> +#include <mach/at91sam9_smc.h> +#include <mach/hardware.h> +#include <mach/iomux.h> + +static struct sam9_smc_config ek_nand_smc_config = { + .ncs_read_setup = 0, + .nrd_setup = 1, + .ncs_write_setup = 0, + .nwe_setup = 1, + + .ncs_read_pulse = 3, + .nrd_pulse = 3, + .ncs_write_pulse = 3, + .nwe_pulse = 3, + + .read_cycle = 5, + .write_cycle = 5, + + .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE, + .tdf_cycles = 2, +}; + +BAREBOX_MAGICVAR(board.mem, "The detected memory size in MiB"); + +static int mem; + +/* + * Initialize of SMC must come after we + * probe the at91sam9_smc_driver. + * But is required before we start the other drives. + * Use device_initcall() to maintain this order. + */ +static int skov_arm9_probe(struct device_d *dev) +{ + unsigned long csa; + + add_generic_device("at91sam9-smc", 0, NULL, AT91SAM9263_BASE_SMC0, 0x200, + IORESOURCE_MEM, NULL); + add_generic_device("at91sam9-smc", 1, NULL, AT91SAM9263_BASE_SMC1, 0x200, + IORESOURCE_MEM, NULL); + + csa = readl(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA); + csa |= AT91SAM9263_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA; + writel(csa, AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA); + + /* configure chip-select 3 (NAND) */ + sam9_smc_configure(0, 3, &ek_nand_smc_config); + + mem = at91_get_sdram_size(IOMEM(AT91SAM9263_BASE_SDRAMC0)); + mem = mem / SZ_1M; + globalvar_add_simple_int("board.mem", &mem, "%u"); + + return 0; +} + +static __maybe_unused struct of_device_id skov_arm9_ids[] = { + { + .compatible = "skov,arm9-cpu", + }, { + /* sentinel */ + } +}; + +static struct driver_d skov_arm9_driver = { + .name = "skov-arm9", + .probe = skov_arm9_probe, + .of_compatible = DRV_OF_COMPAT(skov_arm9_ids), +}; +device_platform_driver(skov_arm9_driver); diff --git a/arch/arm/boards/skov-arm9cpu/lowlevel.c b/arch/arm/boards/skov-arm9cpu/lowlevel.c new file mode 100644 index 0000000000..34f4501927 --- /dev/null +++ b/arch/arm/boards/skov-arm9cpu/lowlevel.c @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +// PDX-FileCopyrightText: 2018 Sam Ravnborg <[email protected]> + +#include <linux/sizes.h> + +#include <asm/barebox-arm.h> + +#include <mach/at91sam926x_board_init.h> +#include <mach/at91sam9263_matrix.h> + +#define MASTER_PLL_MUL 171 +#define MASTER_PLL_DIV 14 + +static void __bare_init skovarm9cpu_board_config(struct at91sam926x_board_cfg *cfg) +{ + /* Disable Watchdog */ + cfg->wdt_mr = + AT91_WDT_WDIDLEHLT | AT91_WDT_WDDBGHLT | + AT91_WDT_WDV | + AT91_WDT_WDDIS | + AT91_WDT_WDD; + + /* define PDC[31:16] as DATA[31:16] */ + cfg->ebi_pio_pdr = 0xFFFF0000; + /* no pull-up for D[31:16] */ + cfg->ebi_pio_ppudr = 0xFFFF0000; + /* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */ + cfg->ebi_csa = + AT91SAM9263_MATRIX_EBI0_DBPUC | AT91SAM9263_MATRIX_EBI0_VDDIOMSEL_3_3V | + AT91SAM9263_MATRIX_EBI0_CS1A_SDRAMC; + + cfg->smc_cs = 0; + cfg->smc_mode = + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_DBW_16 | + AT91_SMC_TDFMODE | + AT91_SMC_TDF_(6); + cfg->smc_cycle = + AT91_SMC_NWECYCLE_(22) | AT91_SMC_NRDCYCLE_(22); + cfg->smc_pulse = + AT91_SMC_NWEPULSE_(11) | AT91_SMC_NCS_WRPULSE_(11) | + AT91_SMC_NRDPULSE_(11) | AT91_SMC_NCS_RDPULSE_(11); + cfg->smc_setup = + AT91_SMC_NWESETUP_(10) | AT91_SMC_NCS_WRSETUP_(10) | + AT91_SMC_NRDSETUP_(10) | AT91_SMC_NCS_RDSETUP_(10); + + cfg->pmc_mor = + AT91_PMC_MOSCEN | + (255 << 8); /* Main Oscillator Start-up Time */ + cfg->pmc_pllar = + AT91_PMC_PLLA_WR_ERRATA | /* Bit 29 must be 1 when prog */ + AT91_PMC_OUT | + AT91_PMC_PLLCOUNT | /* PLL Counter */ + (2 << 28) | /* PLL Clock Frequency Range */ + ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV); + /* PCK/2 = MCK Master Clock from PLLA */ + cfg->pmc_mckr1 = + AT91_PMC_CSS_SLOW | + AT91_PMC_PRES_1 | + AT91SAM9_PMC_MDIV_2 | + AT91_PMC_PDIV_1; + /* PCK/2 = MCK Master Clock from PLLA */ + cfg->pmc_mckr2 = + AT91_PMC_CSS_PLLA | + AT91_PMC_PRES_1 | + AT91SAM9_PMC_MDIV_2 | + AT91_PMC_PDIV_1; + + /* SDRAM */ + /* SDRAMC_TR - Refresh Timer register */ + cfg->sdrc_tr1 = 0x13C; + /* SDRAMC_CR - Configuration register*/ + cfg->sdrc_cr = + AT91_SDRAMC_NC_10 | /* Assume 128MiB */ + AT91_SDRAMC_NR_13 | + AT91_SDRAMC_NB_4 | + AT91_SDRAMC_CAS_3 | + AT91_SDRAMC_DBW_32 | + (1 << 8) | /* Write Recovery Delay */ + (7 << 12) | /* Row Cycle Delay */ + (2 << 16) | /* Row Precharge Delay */ + (2 << 20) | /* Row to Column Delay */ + (5 << 24) | /* Active to Precharge Delay */ + (1 << 28); /* Exit Self Refresh to Active Delay */ + + /* Memory Device Register -> SDRAM */ + cfg->sdrc_mdr = AT91_SDRAMC_MD_SDRAM; + /* SDRAM_TR */ + cfg->sdrc_tr2 = 1200; + + /* user reset enable */ + cfg->rstc_rmr = + AT91_RSTC_KEY | + AT91_RSTC_PROCRST | + AT91_RSTC_RSTTYP_WAKEUP | + AT91_RSTC_RSTTYP_WATCHDOG; +} + +static void __bare_init skov_arm9cpu_init(void *fdt) +{ + struct at91sam926x_board_cfg cfg; + + cfg.pio = IOMEM(AT91SAM9263_BASE_PIOD); + cfg.sdramc = IOMEM(AT91SAM9263_BASE_SDRAMC0); + cfg.ebi_pio_is_peripha = true; + cfg.matrix_csa = IOMEM(AT91SAM9263_BASE_MATRIX + AT91SAM9263_MATRIX_EBI0CSA); + + skovarm9cpu_board_config(&cfg); + at91sam9263_board_init(&cfg); + + barebox_arm_entry(AT91_CHIPSELECT_1, at91_get_sdram_size(cfg.sdramc), + fdt); +} + +extern char __dtb_at91_skov_arm9cpu_start[]; + +ENTRY_FUNCTION(start_skov_arm9cpu, r0, r1, r2) +{ + void *fdt; + + arm_cpu_lowlevel_init(); + + arm_setup_stack(AT91SAM9263_SRAM0_BASE + AT91SAM9263_SRAM0_SIZE - 16); + fdt = __dtb_at91_skov_arm9cpu_start + get_runtime_offset(); + + skov_arm9cpu_init(fdt); +} diff --git a/arch/arm/configs/at91_multi_defconfig b/arch/arm/configs/at91_multi_defconfig index e6a554e87f..f0a4812f0c 100644 --- a/arch/arm/configs/at91_multi_defconfig +++ b/arch/arm/configs/at91_multi_defconfig @@ -1,4 +1,5 @@ CONFIG_AT91_MULTI_BOARDS=y +CONFIG_MACH_SKOV_ARM9CPU=y CONFIG_MACH_AT91SAM9263EK=y CONFIG_MACH_AT91SAM9X5EK=y CONFIG_MACH_MICROCHIP_KSZ9477_EVB=y diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d5f61768a5..9ce385d332 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -110,6 +110,7 @@ lwl-$(CONFIG_MACH_SOLIDRUN_CUBOX) += dove-cubox-bb.dtb.o lwl-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingboard.dtb.o \ imx6dl-hummingboard2.dtb.o imx6q-hummingboard2.dtb.o \ imx6q-h100.dtb.o +lwl-$(CONFIG_MACH_SKOV_ARM9CPU) += at91-skov-arm9cpu.dtb.o lwl-$(CONFIG_MACH_SEEED_ODYSSEY) += stm32mp157c-odyssey.dtb.o lwl-$(CONFIG_MACH_STM32MP15XX_DKX) += stm32mp157c-dk2.dtb.o stm32mp157a-dk1.dtb.o lwl-$(CONFIG_MACH_LXA_MC1) += stm32mp157c-lxa-mc1.dtb.o diff --git a/arch/arm/dts/at91-skov-arm9cpu.dts b/arch/arm/dts/at91-skov-arm9cpu.dts new file mode 100644 index 0000000000..3f1df618d7 --- /dev/null +++ b/arch/arm/dts/at91-skov-arm9cpu.dts @@ -0,0 +1,453 @@ +// SPDX-License-Identifier: GPL-2.0 +// SPDX-FileCopyrightText: 2018 Sam Ravnborg <[email protected]> + +/* + * Device Tree file for SKOV ARM9 CPU board with 128 MB RAM and + * Logic Technology Display + */ + +/dts-v1/; + +#include "arm/at91sam9263.dtsi" + +/ { + model = "SKOV ARM9 CPU"; + compatible = "skov,arm9-cpu", "atmel,at91sam9263", "atmel,at91sam9"; + + chosen { + stdout-path = "serial0:115200n8"; + + environment { + compatible = "barebox,environment"; + device-path = &environment_nor; + }; + }; + + ahb { + apb { + pinctrl: pinctrl@fffff200 { + }; + + watchdog@fffffd40 { + status = "okay"; + }; + }; + + flash: nor_flash@10000000 { + compatible = "cfi-flash"; + reg = <0x10000000 0x4000000>; + linux,mtd-name = "physmap-flash.0"; + bank-width = <2>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + barebox@0 { + label = "bootloader"; + reg = <0x00000 0x80000>; + }; + + environment_nor: env@80000 { + label = "environment"; + reg = <0x80000 0x20000>; + }; + + linux@a0000 { + label = "linux"; + reg = <0xa0000 0x2a0000>; + }; + + rootfs@340000 { + label = "rootfs"; + reg = <0x340000 0x3cc0000>; + }; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + D0 { + label = "D0"; + gpios = <&pioD 0 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; + + D1 { + label = "D1"; + gpios = <&pioD 1 GPIO_ACTIVE_LOW>; + linux,default-trigger = "mmc0"; + }; + + D2 { + label = "D2"; + gpios = <&pioD 7 GPIO_ACTIVE_LOW>; + }; + + led_0 { + label = "led_0"; + gpios = <&pioB 14 GPIO_ACTIVE_LOW>; + }; + + led_1 { + label = "led_1"; + gpios = <&pioB 23 GPIO_ACTIVE_LOW>; + }; + + led_2 { + label = "led_2"; + gpios = <&pioB 18 GPIO_ACTIVE_LOW>; + }; + + led_3 { + label = "led_3"; + gpios = <&pioB 22 GPIO_ACTIVE_LOW>; + }; + + led_4 { + label = "led_4"; + gpios = <&pioA 22 GPIO_ACTIVE_LOW>; + }; + + led_5 { + label = "led_5"; + gpios = <&pioA 23 GPIO_ACTIVE_LOW>; + }; + + led_6 { + label = "led_6"; + gpios = <&pioA 24 GPIO_ACTIVE_LOW>; + }; + + led_7 { + label = "led_7"; + gpios = <&pioA 20 GPIO_ACTIVE_LOW>; + }; + }; + + i2c-gpio-0 { + status = "okay"; + + 24c512@50 { + compatible = "24c512"; + reg = <0x50>; + pagesize = <128>; + }; + }; + + rotary-encoder { + compatible = "rotary-encoder"; + gpios = <&pioB 19 GPIO_ACTIVE_LOW>, <&pioB 20 GPIO_ACTIVE_LOW>; + linux,axis = <0>; /* REL_X */ + rotary-encoder,steps-per-period = <4>; + rotary-encoder,relative-axis; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + rotary_button { + label = "rotary_button"; + gpios = <&pioB 15 GPIO_ACTIVE_LOW>; + debounce-interval = <10>; + linux,code = <28>; /* enter */ + }; + }; + + matrix-keypad-6x5 { + compatible = "gpio-matrix-keypad"; + debounce-delay-ms = <10>; + col-scan-delay-us = <10>; + + row-gpios = <&pioB 25 GPIO_ACTIVE_HIGH /* 1 */ + &pioB 21 GPIO_ACTIVE_HIGH /* 2 */ + &pioB 16 GPIO_ACTIVE_HIGH /* 3 */ + &pioB 24 GPIO_ACTIVE_HIGH /* 4 */ + &pioB 12 GPIO_ACTIVE_HIGH>; /* 5 */ + + col-gpios = <&pioB 13 GPIO_ACTIVE_HIGH /* 1 */ + &pioB 17 GPIO_ACTIVE_HIGH /* 2 */ + &pioA 25 GPIO_ACTIVE_HIGH /* 3 */ + &pioA 21 GPIO_ACTIVE_HIGH /* 4 */ + &pioA 19 GPIO_ACTIVE_HIGH /* 5 */ + &pioA 18 GPIO_ACTIVE_HIGH>; /* 6 */ + + + linux,keymap = < + 0x00000011 /* col0 row0 KEY_W */ + 0x01000021 /* col0 row1 KEY_F */ + 0x02000031 /* col0 row2 KEY_N */ + 0x03000041 /* col0 row3 KEY_F7 */ + 0x04000051 /* col0 row4 KEY_KP3 */ + 0x00010012 /* col1 row0 KEY_E */ + 0x01010022 /* col1 row1 KEY_G */ + 0x02010032 /* col1 row2 KEY_M */ + 0x03010042 /* col1 row3 KEY_F8 */ + 0x04010052 /* col1 row4 KEY_KP0 */ + 0x00020013 /* col2 row0 KEY_R */ + 0x01020023 /* col2 row1 KEY_H */ + 0x02020033 /* col2 row2 KEY_COMMA */ + 0x03020043 /* col2 row3 KEY_F9 */ + 0x04020053 /* col2 row4 KEY_F9 */ + 0x00030014 /* col3 row0 KEY_T */ + 0x01030024 /* col3 row1 KEY_J */ + 0x02030034 /* col3 row2 KEY_DOT */ + 0x03030044 /* col3 row3 KEY_NUMLOCK */ + 0x04030054 /* col3 row4 */ + 0x00040015 /* col4 row0 KEY_Y */ + 0x01040025 /* col4 row1 KEY_K */ + 0x02040035 /* col4 row2 KEY_SLASH */ + 0x03040045 /* col4 row3 KEY_NUMLOCK */ + 0x04040055 /* col4 row4 KEY_ZENKAKUHANKAKU */ + 0x00050016 /* col5 row0 KEY_U */ + 0x01050026 /* col5 row1 KEY_L */ + 0x02050036 /* col5 row2 KEY_RIGH_SHIFT */ + 0x03050046 /* col5 row3 KEY_SCROLLLOCK */ + 0x04050056 /* col5 row4 KEY_102ND */ + >; + }; +}; + +&dbgu { + status = "okay"; +}; + +&fb0 { + status = "okay"; + display = <&display0>; + display0: display0 { + bits-per-pixel = <16>; + atmel,lcdcon-backlight; + atmel,dmacon = <0x1>; + atmel,lcdcon2 = <0x80008002>; + atmel,guard-time = <1>; + atmel,lcd-wiring-mode = "BRG"; + pinctrl-names = "default"; + pinctrl-0 = < + &pinctrl_board_fb + &pinctrl_disp_type + &pinctrl_logic_type + >; + + atmel,power-control-gpio = <&pioA 30 GPIO_ACTIVE_HIGH>; + + display-timings { + native-mode = <&l2rt>; + + l2rt: l2rt { + /* LTTD800480070-L2RT @ 55 */ + clock-frequency = <30000000>; + hactive = <800>; + vactive = <480>; + /* Atmel calculation + * Horizontal = + * Hsync + left margin + picture + right_margin + 1 + * (3 + 85 + 800 + 0 + 1 = 889) + */ + hback-porch = <85>; + hfront-porch = <1>; + hsync-len = <3>; + /* Vertical = + * upper margin + picture + lower_margin + * (32 + 480 + 1 = 513) (25MHz / ( 889 * 513 ) = 54,8Hz + */ + vback-porch = <32>; + vfront-porch = <1>; + vsync-len = <3>; + pixelclk-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + }; + + l6whrt: l6whrt { + clock-frequency = <33000000>; + hactive = <800>; + vactive = <480>; + hback-porch = <43>; + hfront-porch = <154>; + vback-porch = <20>; + vfront-porch = <47>; + hsync-len = <3>; + vsync-len = <3>; + pixelclk-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + }; + + seiko: seiko { + /* 70WVW2AZ0 @ 55 */ + clock-frequency = <33000000>; + hactive = <800>; + vactive = <480>; + hback-porch = <0>; + hfront-porch = <256>; + vback-porch = <45>; + vfront-porch = <0>; + hsync-len = <0>; + vsync-len = <0>; + pixelclk-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + }; + }; + }; +}; + +&macb0 { + status = "okay"; + phy-mode = "rmii"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@1 { + reg = <3>; + reset-gpios = <&pioE 17 GPIO_ACTIVE_LOW>; + reset-assert-us = <1000>; + reset-deassert-us = <100>; + }; +}; + +&main_xtal { + clock-frequency = <16000000>; +}; + +&mmc1 { + status = "okay"; + pinctrl-0 = < + &pinctrl_board_mmc1 + &pinctrl_mmc1_clk + &pinctrl_mmc1_slot0_cmd_dat0 + &pinctrl_mmc1_slot0_dat1_3>; + cd-gpios = <&pioE 18 GPIO_ACTIVE_HIGH>; + slot@0 { + reg = <0>; + bus-width = <4>; + cd-gpios = <&pioE 18 GPIO_ACTIVE_HIGH>; + wp-gpios = <&pioE 19 GPIO_ACTIVE_HIGH>; + }; +}; + +&pinctrl { + mmc1 { + pinctrl_board_mmc1: mmc1-board { + atmel,pins = + <AT91_PIOE 18 AT91_PERIPH_GPIO + AT91_PINCTRL_PULL_UP_DEGLITCH /* PE18 gpio CD pin pull up and deglitch */ + AT91_PIOE 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PE19 gpio WP pin pull up */ + }; + }; + + display_type_inputs { + pinctrl_disp_type: disp_type-0 { + /* Pull-up (HIGH) if Seiko display, otherwise Logic display */ + atmel,pins = + <AT91_PIOD 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; + }; + pinctrl_logic_type: logic_type-0 { + /* Pull-down (LOW) if l6whrt display, otherwise l2rt display */ + atmel,pins = + <AT91_PIOC 28 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; + }; + }; + + fb { + pinctrl_board_fb: fb-0 { + atmel,pins = + <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */ + AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */ + AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDOTCK */ + AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */ + AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* LCDCC */ + AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 */ + AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 */ + AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 */ + AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 */ + AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 */ + AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 */ + AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 */ + AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 */ + AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 */ + AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* LCDD13 */ + AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 */ + AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 */ + AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 */ + AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 */ + AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 */ + AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* LCDD21 */ + AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 */ + AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 */ + }; + }; + + pwm0 { + pinctrl_pwm0: pwm0_pwm1 { + atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; + }; + }; +}; + +&pwm0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0>; +}; + +&slow_xtal { + clock-frequency = <32768>; +}; + +&spi0 { + status = "okay"; + cs-gpios = <&pioA 3 0>, <&pioB 11 0>; + + mcp3002@0 { + compatible = "microchip,mcp3002"; + reg = <0>; + spi-max-frequency = <750000>; + }; + + tsc2046@1 { + compatible = "ti,tsc2046"; + reg = <1>; + interrupts-extended = <&pioA 15 IRQ_TYPE_EDGE_BOTH>; + spi-max-frequency = <500000>; + pendown-gpio = <&pioA 15 GPIO_ACTIVE_LOW>; + + ti,x-min = /bits/ 16 <800>; + ti,x-max = /bits/ 16 <3830>; + ti,y-min = /bits/ 16 <500>; + ti,y-max = /bits/ 16 <3830>; + ti,vref-delay-usecs = /bits/ 16 <300>; + ti,x-plate-ohms = /bits/ 16 <642>; + ti,y-plate-ohms = /bits/ 16 <295>; + ti,pressure-max = /bits/ 16 <1500>; + ti,debounce-rep = /bits/ 16 <8>; + ti,debounce-tol = /bits/ 16 <(~0)>; + ti,debounce-max = /bits/ 16 <100>; + + wakeup-source; + }; +}; + +&usart0 { + status = "okay"; + pinctrl-0 = < + &pinctrl_usart0 + &pinctrl_usart0_rts + &pinctrl_usart0_cts>; +}; + +&usb0 { + status = "okay"; + num-ports = <2>; +}; diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 52eefc7361..810c00d495 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -577,6 +577,17 @@ config AT91_MULTI_BOARDS if AT91_MULTI_BOARDS +config MACH_SKOV_ARM9CPU + bool "SKOV ARM9 CPU" + select SOC_AT91SAM9263 + select OFDEVICE + select COMMON_CLK_OF_PROVIDER + select HAVE_AT91_USB_CLK + select HAVE_AT91_BOOTSTRAP + select AT91SAM926X_BOARD_INIT + help + Say y here if you are using SKOV's ARM9 CPU board + config MACH_AT91SAM9263EK bool "Atmel AT91SAM9263-EK" select SOC_AT91SAM9263 diff --git a/images/Makefile.at91 b/images/Makefile.at91 index 00fa4cab27..7ab92edf14 100644 --- a/images/Makefile.at91 +++ b/images/Makefile.at91 @@ -31,3 +31,8 @@ pblb-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += start_sama5d27_giantboard_xload_mmc FILE_barebox-groboards-sama5d27-giantboard-xload-mmc.img = start_sama5d27_giantboard_xload_mmc.pblb MAX_PBL_IMAGE_SIZE_start_sama5d27_giantboard_xload_mmc = 0xffff image-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += barebox-groboards-sama5d27-giantboard-xload-mmc.img + +pblb-$(CONFIG_MACH_SKOV_ARM9CPU) += start_skov_arm9cpu +FILE_barebox-skov-arm9cpu.img = start_skov_arm9cpu.pblb +MAX_PBL_MEMORY_SIZE_start_skov_arm9cpu = 0x12000 +image-$(CONFIG_MACH_SKOV_ARM9CPU) += barebox-skov-arm9cpu.img -- 2.29.2 _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
