Hello,
On 07.05.21 00:08, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov <[email protected]>
> ---
> arch/riscv/Kconfig | 22 ++++++++++++----------
> arch/riscv/Kconfig.socs | 4 +++-
> arch/riscv/configs/erizo_generic_defconfig | 1 +
> 3 files changed, 16 insertions(+), 11 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index a4aa799acf..dcff00d63f 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -38,6 +38,18 @@ config ARCH_RV64I
>
> endchoice
>
> +choice
> + prompt "Privilege level"
> + default RISCV_SBI
> +
> +config RISCV_SBI
> + bool "S-mode (supervisor mode), use SBI calls"
> +
> +config RISCV_M_MODE
> + bool "M-mode (machine mode)"
> +
> +endchoice
Hmm. I am wondering if we shouldn't just make both selectable
at the same time and fix code to call a function that determines
mode dynamically? e.g.
enum riscv_mode { RISCV_M_MODE = 1, RISCV_S_MODE = 2 };
static inline enum riscv_mode riscv_get_mode(void)
{
if (IS_ENABLED(CONFIG_RISCV_M_MODE) && IS_ENABLED(CONFIG_RISCV_S_MODE))
{
/* somehow determine it dynamically */
}
return IS_ENABLED(CONFIG_RISCV_M_MODE) ? RISCV_M_MODE : RISCV_S_MODE;
}
I would really like to have a riscv{32,64}_defconfig that can just build all
boards
at once. Do you know if this could be dynamically determined?
> +
> source "arch/riscv/Kconfig.socs"
>
> config CPU_SUPPORTS_32BIT_KERNEL
> @@ -97,14 +109,4 @@ config NMON_HELP
> Say yes here to get the nmon commands message on
> every nmon start.
>
> -# set if we run in machine mode, cleared if we run in supervisor mode
> -config RISCV_M_MODE
> - bool
> -
> -# set if we are running in S-mode and can use SBI calls
> -config RISCV_SBI
> - bool
> - depends on !RISCV_M_MODE
> - default y
> -
> endmenu
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index c6875738d0..f767942f34 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -3,10 +3,10 @@ menu "SoC selection"
> config SOC_ERIZO
> bool "Erizo SoC"
> depends on ARCH_RV32I
> + depends on RISCV_M_MODE
> select HAS_ASM_DEBUG_LL
> select HAS_NMON
> select USE_COMPRESSED_DTB
> - select RISCV_M_MODE
> select RISCV_TIMER
>
> config BOARD_ERIZO_GENERIC
> @@ -15,6 +15,7 @@ config BOARD_ERIZO_GENERIC
>
> config SOC_VIRT
> bool "QEMU Virt Machine"
> + depends on RISCV_SBI
> select BOARD_RISCV_GENERIC_DT
> select CLINT_TIMER
> help
> @@ -23,6 +24,7 @@ config SOC_VIRT
>
> config SOC_SIFIVE
> bool "SiFive SoCs"
> + depends on RISCV_SBI
> select CLK_SIFIVE
> select CLK_SIFIVE_PRCI
> select RISCV_TIMER
> diff --git a/arch/riscv/configs/erizo_generic_defconfig
> b/arch/riscv/configs/erizo_generic_defconfig
> index 247a179130..16168eef66 100644
> --- a/arch/riscv/configs/erizo_generic_defconfig
> +++ b/arch/riscv/configs/erizo_generic_defconfig
> @@ -1,3 +1,4 @@
> +CONFIG_RISCV_M_MODE=y
> CONFIG_SOC_ERIZO=y
> # CONFIG_GLOBALVAR is not set
> CONFIG_STACK_SIZE=0x20000
>
--
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