Convert another register to use the Linux defines.
Signed-off-by: Sascha Hauer <[email protected]>
---
drivers/mci/arasan-sdhci.c | 6 +++---
drivers/mci/atmel-sdhci-common.c | 6 +++---
drivers/mci/dove-sdhci.c | 6 +++---
drivers/mci/sdhci.h | 13 +++++++------
4 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/drivers/mci/arasan-sdhci.c b/drivers/mci/arasan-sdhci.c
index 7bd98c0a96..180f0042bf 100644
--- a/drivers/mci/arasan-sdhci.c
+++ b/drivers/mci/arasan-sdhci.c
@@ -182,12 +182,12 @@ static void arasan_sdhci_set_ios(struct mci_host *mci,
struct mci_ios *ios)
val = arasan_sdhci_get_clock_divider(host, ios->clock);
/* Bit 6 & 7 are upperbits of 10bit divider */
val = SDHCI_FREQ_SEL(val) | SDHCI_FREQ_SEL_10_BIT(val);
- val |= SDHCI_INTCLOCK_EN;
+ val |= SDHCI_CLOCK_INT_EN;
sdhci_write16(&host->sdhci, SDHCI_CLOCK_CONTROL, val);
start = get_time_ns();
while (!(sdhci_read16(&host->sdhci, SDHCI_CLOCK_CONTROL) &
- SDHCI_INTCLOCK_STABLE)) {
+ SDHCI_CLOCK_INT_STABLE)) {
if (is_timeout(start, 20 * MSECOND)) {
dev_err(host->mci.hw_dev,
"SDHCI clock stable timeout\n");
@@ -196,7 +196,7 @@ static void arasan_sdhci_set_ios(struct mci_host *mci,
struct mci_ios *ios)
}
/* enable bus clock */
sdhci_write16(&host->sdhci, SDHCI_CLOCK_CONTROL,
- val | SDHCI_SDCLOCK_EN);
+ val | SDHCI_CLOCK_CARD_EN);
}
sdhci_set_bus_width(&host->sdhci, ios->bus_width);
diff --git a/drivers/mci/atmel-sdhci-common.c b/drivers/mci/atmel-sdhci-common.c
index d2b777a93c..5a734d0d47 100644
--- a/drivers/mci/atmel-sdhci-common.c
+++ b/drivers/mci/atmel-sdhci-common.c
@@ -262,19 +262,19 @@ static int at91_sdhci_set_clock(struct at91_sdhci *host,
unsigned clock)
clk |= SDHCI_FREQ_SEL(clk_div);
clk |= ((clk_div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
<< SDHCI_DIVIDER_HI_SHIFT;
- clk |= SDHCI_INTCLOCK_EN;
+ clk |= SDHCI_CLOCK_INT_EN;
sdhci_write16(sdhci, SDHCI_CLOCK_CONTROL, clk);
ret = sdhci_read32_poll_timeout(sdhci, SDHCI_CLOCK_CONTROL, clk,
- clk & SDHCI_INTCLOCK_STABLE,
+ clk & SDHCI_CLOCK_INT_STABLE,
20 * USEC_PER_MSEC);
if (ret) {
dev_warn(host->dev, "Timeout waiting for clock stable\n");
return ret;
}
- clk |= SDHCI_SDCLOCK_EN;
+ clk |= SDHCI_CLOCK_CARD_EN;
sdhci_write16(sdhci, SDHCI_CLOCK_CONTROL, clk);
reg = sdhci_read8(sdhci, SDHCI_HOST_CONTROL);
diff --git a/drivers/mci/dove-sdhci.c b/drivers/mci/dove-sdhci.c
index cafc9dc579..f4f8dabba1 100644
--- a/drivers/mci/dove-sdhci.c
+++ b/drivers/mci/dove-sdhci.c
@@ -244,13 +244,13 @@ static void dove_sdhci_mci_set_ios(struct mci_host *mci,
struct mci_ios *ios)
/* set bus clock */
sdhci_write16(&host->sdhci, SDHCI_CLOCK_CONTROL, 0);
val = dove_sdhci_get_clock_divider(host, ios->clock);
- val = SDHCI_INTCLOCK_EN | SDHCI_FREQ_SEL(val);
+ val = SDHCI_CLOCK_INT_EN | SDHCI_FREQ_SEL(val);
sdhci_write16(&host->sdhci, SDHCI_CLOCK_CONTROL, val);
/* wait for internal clock stable */
start = get_time_ns();
while (!(sdhci_read16(&host->sdhci, SDHCI_CLOCK_CONTROL) &
- SDHCI_INTCLOCK_STABLE)) {
+ SDHCI_CLOCK_INT_STABLE)) {
if (is_timeout(start, 20 * MSECOND)) {
dev_err(host->mci.hw_dev, "SDHCI clock stable
timeout\n");
return;
@@ -258,7 +258,7 @@ static void dove_sdhci_mci_set_ios(struct mci_host *mci,
struct mci_ios *ios)
}
/* enable bus clock */
- sdhci_write16(&host->sdhci, SDHCI_CLOCK_CONTROL, val |
SDHCI_SDCLOCK_EN);
+ sdhci_write16(&host->sdhci, SDHCI_CLOCK_CONTROL, val |
SDHCI_CLOCK_CARD_EN);
}
static int dove_sdhci_mci_init(struct mci_host *mci, struct device_d *dev)
diff --git a/drivers/mci/sdhci.h b/drivers/mci/sdhci.h
index 0b436d3aa2..2605ecb535 100644
--- a/drivers/mci/sdhci.h
+++ b/drivers/mci/sdhci.h
@@ -75,17 +75,18 @@
#define SDHCI_BUS_VOLTAGE(v) ((v) << 1)
#define SDHCI_BUS_POWER_EN BIT(0)
#define SDHCI_CLOCK_CONTROL__TIMEOUT_CONTROL__SOFTWARE_RESET 0x2c
-#define SDHCI_CLOCK_CONTROL 0x2c
+#define SDHCI_CLOCK_CONTROL 0x2C
#define SDHCI_DIVIDER_SHIFT 8
#define SDHCI_DIVIDER_HI_SHIFT 6
#define SDHCI_DIV_MASK 0xFF
-#define SDHCI_DIV_HI_MASK 0x300
#define SDHCI_DIV_MASK_LEN 8
-#define SDHCI_FREQ_SEL(x) (((x) & 0xff) << 8)
+#define SDHCI_FREQ_SEL(x) (((x) & 0xff) << 8)
+#define SDHCI_DIV_HI_MASK 0x300
#define SDHCI_PROG_CLOCK_MODE BIT(5)
-#define SDHCI_SDCLOCK_EN BIT(2)
-#define SDHCI_INTCLOCK_STABLE BIT(1)
-#define SDHCI_INTCLOCK_EN BIT(0)
+#define SDHCI_CLOCK_CARD_EN BIT(2)
+#define SDHCI_CLOCK_PLL_EN BIT(3)
+#define SDHCI_CLOCK_INT_STABLE BIT(1)
+#define SDHCI_CLOCK_INT_EN BIT(0)
#define SDHCI_TIMEOUT_CONTROL 0x2e
#define SDHCI_SOFTWARE_RESET 0x2f
#define SDHCI_RESET_ALL BIT(0)
--
2.29.2
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