As DDRC_ADDRMAP7_ROW_B16 and DDRC_ADDRMAP7_ROW_B17 are used
now for the row size calculation we need to increase row_max to 18.
For LPDDR4 this only works in combination with ram timings
created with recent configuration spreadsheet versions.
With older versions the register DDRC_ADDRMAP7 may not be set and
calculation will lead to wrong results even with this patch.
Fixes: dad2b5636bd8 ("ARM: imx: Add imx8 support for 18 bit SDRAM row size
handle")
Signed-off-by: Teresa Remmet <[email protected]>
---
arch/arm/mach-imx/esdctl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c
index 8dd0ddbbc965..b070ebc62a45 100644
--- a/arch/arm/mach-imx/esdctl.c
+++ b/arch/arm/mach-imx/esdctl.c
@@ -488,7 +488,7 @@ static resource_size_t imx8m_ddrc_sdram_size(void __iomem
*ddrc)
return imx_ddrc_sdram_size(ddrc, addrmap,
12, ARRAY_AND_SIZE(col_b),
- 16, ARRAY_AND_SIZE(row_b),
+ 18, ARRAY_AND_SIZE(row_b),
reduced_adress_space, true);
}
--
2.25.1
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