Macro definitions should be guarded with braces for safer use.
Signed-off-by: Steffen Trumtrar <[email protected]>
---
arch/arm/boards/reflex-achilles/lowlevel.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boards/reflex-achilles/lowlevel.c
b/arch/arm/boards/reflex-achilles/lowlevel.c
index 2efb9aaea0..ec8c126c2a 100644
--- a/arch/arm/boards/reflex-achilles/lowlevel.c
+++ b/arch/arm/boards/reflex-achilles/lowlevel.c
@@ -23,15 +23,16 @@
#define BAREBOX_PART 0
#define BITSTREAM_PART 1
#define BAREBOX1_OFFSET SZ_1M
-#define BAREBOX2_OFFSET BAREBOX1_OFFSET + SZ_512K
-#define BAREBOX3_OFFSET BAREBOX2_OFFSET + SZ_512K
-#define BAREBOX4_OFFSET BAREBOX3_OFFSET + SZ_512K
+#define BAREBOX2_OFFSET (BAREBOX1_OFFSET + SZ_512K)
+#define BAREBOX3_OFFSET (BAREBOX2_OFFSET + SZ_512K)
+#define BAREBOX4_OFFSET (BAREBOX3_OFFSET + SZ_512K)
+// Offset from the start of the second partition on the eMMC.
#define BITSTREAM1_OFFSET 0x0
-#define BITSTREAM2_OFFSET BITSTREAM1_OFFSET + SZ_32M
+#define BITSTREAM2_OFFSET (BITSTREAM1_OFFSET + SZ_32M)
extern char __dtb_z_socfpga_arria10_achilles_start[];
-#define ARRIA10_STACKTOP ARRIA10_OCRAM_ADDR + SZ_256K
+#define ARRIA10_STACKTOP (ARRIA10_OCRAM_ADDR + SZ_256K)
ENTRY_FUNCTION_WITHSTACK(start_socfpga_achilles_xload, ARRIA10_STACKTOP, r0,
r1, r2)
{
--
2.30.2
