xhci_flush_cache() is a no-op in barebox, because we use dma-coherent allocations. Nevertheless, we define a stub for xhci_flush_cache, which is used should we ever want to change this behavior.
The original U-Boot code doesn't use dma-coherent allocations and has run into a few cache invalidation issues. Import the xhci_flush_cache() added in the meantime. No functional change. Signed-off-by: Ahmad Fatoum <[email protected]> --- drivers/usb/host/xhci-mem.c | 3 +++ drivers/usb/host/xhci-ring.c | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 5ae1512af53a..db38fd43f65a 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -408,6 +408,9 @@ static int xhci_scratchpad_alloc(struct xhci_ctrl *ctrl) scratchpad->sp_array[i] = cpu_to_le64(ptr); } + xhci_flush_cache((uintptr_t)scratchpad->sp_array, + sizeof(u64) * num_sp); + return 0; fail_sp3: diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 804384e0307f..d725b71983cd 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -670,6 +670,9 @@ int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe, first_trb = true; + /* flush the buffer before use */ + xhci_flush_cache((uintptr_t)buffer, length); + /* Queue the first TRB, even if it's zero-length */ do { u32 remainder = 0; @@ -913,6 +916,7 @@ int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe, trb_fields[2] = length_field; trb_fields[3] = field | ep_ring->cycle_state; + xhci_flush_cache((uintptr_t)buffer, length); queue_trb(ctrl, ep_ring, true, trb_fields); } -- 2.39.2
