Hi Steffen, On Mon, Jun 23, 2025 at 03:57:49PM +0200, Steffen Trumtrar wrote: > Add initial support for the Intel Agilex5 SoCFPGA platform. > > The Agilex5 devices have: > - Quad-core cluster consisting of Dual-core 64-bit Arm Cortex-A76, and > dual-core 64-bit Arm Cortex-A55 (SoC only) > - High-Speed transceivers, up to 17.1 Gbps (group B) and 28.1 Gbps (group A) > - PCIe Gen4 x4 > - DDR4/LPDDR4/LPDDR5, and DDR5 (group A) > - Native MIPI CSI-2 and D-PHY (multiple channels) > - Secure Device Manager (SDM) to support secure configuration and tamper > prevention, and hardened cryptographic engines > (from > https://www.rocketboards.org/foswiki/Documentation/ArrowAXE5EagleDevelopmentKit)
This patch contains imported code from elsewhere. Could you leave a note where the code is from, preferably including a commit hash? This will become in handy for future updates. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
