Hi,

My code is at: https://github.com/dpproto/barebox/tree/board-enclustra-sa2

I tried to change the alignment, as you suggested in this commit: https://github.com/dpproto/barebox/commit/518f39867ef7fef069c3a59934d8d5f55b7981ff
-    buf = calloc(ALIGN(read_size, 2) + 2, 1);
+   buf = memalign(64, read_size + 10);        // add 10 bytes; absolute random choice...


fdt_blob and fdt are now 64-byte aligned. With CONFIG_DEBUG_LL disabled in the 1st stage, I get this output:

===================
barebox 2025.06.1 #1 Thu Jul 10 10:37:51 CEST 2025


Board: SoCFPGA
No consoles were activated. Activating all consoles as fallback!
dw_mmc dw_mmc0: registered as mci0
mci0: detected SD card version 2.0
mci0: registered disk0
starting bootloader...
lowlevel.h: start_socfpga_c5_common() >> start
start_socfpga_c5_common() >> arm_cpu_lowlevel_init() OK
include/mach/socfpga/lowlevel.h: start_socfpga_c5_common() >>> fdt_blob=0x00002300 fdt=0x1ff87b00 size=0x40000000
uncompress.c: memory at 0x00000000, size 0x40000000
mmu: enabling MMU, ttb @ 0x3ffe0000
endmem                = 0x40000000
arm_mem_scratch       = 0x3fff8000+0x00008000
arm_mem_stack         = 0x3fff0000+0x00008000
arm_mem_ttb           = 0x3ffe0000+0x00010000
arm_mem_barebox_image = 0x3fe00000+0x00200000
arm_mem_early_malloc  = 0x3fde0000+0x00020000
membase               = 0x00000000+0x40000000
uncompress.c: uncompressing barebox binary at 0x1ff8c858 (size 0x000502d2) to 0x3fe00000 (uncompressed size: 0x00077fd0)
uncompress.c: jumping to uncompressed image at 0x3fe00001
uncompress.c: calling armv7_switch_to_hyp()...
uncompress.c: armv7_switch_to_hyp() OK. Now jumping...
===================

Despite the chosen/stdout-path set in the DT, I still get the no console warning. Maybe, I didn't do it properly.
https://github.com/dpproto/barebox/commit/2ca6fe47a1ad1cdea12520bed66a7f260624e54e


With the CONFIG_DEBUG_LL and CONFIG_DEBUG_SOCFPGA_UART0 options enabled in the 1st stage, and regardless of whether memalign() replaces calloc() or not, I get:

===================
lowlevel init done
SDRAM setup...
SDRAM calibration...
done
ERR: ref outside dest buf        << MY DEBUG message in lib/lz4/lz4_decompress.c
ERROR: Decoding failed
HANG
===================

The error I catch happens in lib/lz4/lz4_decompress.c
https://github.com/dpproto/barebox/commit/1273048898fb4f9e5613b944b4871bc5f9b8f178

I seems that memalign() instead of calloc() doesn't help. puts_ll() doesn't work in lib/libfile.c; I can't check if the pointer returned by calloc()/memalign() is null.

Should I still try to:
- replace lz4 with lzo?
- add debug messages in start.c?

David

Le 03/07/2025 à 22:35, Sascha Hauer a écrit :
On Thu, Jul 03, 2025 at 04:21:52PM +0200, David Picard wrote:
Hello,

I'm trying to port the Enclustra SA2 module. I started off the Terasic DE0
nano Soc board, that I could run with success previously. They both have a
Cyclone V SoC FPGA. I added some pr_debug().

My code is here, in the board-enclustra-sa2 branch:
https://github.com/dpproto/barebox

It hangs when the execution jumps to the uncompressed Barebox image, and I'm
really stuck.

Enclustra provides a U-Boot configuration, with handoff files. I tried to
compare them with those I copied from a sample Quartus project they provide
too. I couldn't notice striking differences, although it's not easy to
compare because they used an older version of Quartus.

- The addresses and sizes in the log output below don't seem to exceed SDRAM
boundaries, do they?
- Any hint on anything to check?

David

=============================
barebox 2025.06.1 #1 Thu Jul 3 10:53:43 CEST 2025


Board: SoCFPGA
No consoles were activated. Activating all consoles as fallback!
dw_mmc dw_mmc0: registered as mci0
mci0: detected SD card version 2.0
mci0: registered disk0
starting bootloader...
arch/arm/boards/enclustra-sa2/lowlevel.c: __start_socfpga_sa2() >>> start
include/mach/socfpga/lowlevel.h: start_socfpga_c5_common() >>> start
include/mach/socfpga/lowlevel.h: start_socfpga_c5_common() >>>
arm_cpu_lowlevel_init() OK
include/mach/socfpga/lowlevel.h: start_socfpga_c5_common() >>>
fdt_blob=0x00002320 fdt=0x1ff87ae8 size=0x40000000
This looks strange. Your fdt blob is at offset 0x2320 in the binary, but
the final pointer is at 0x1ff87ae8 meaning that your binary is only 8
byte aligned in memory. I would expect a bigger alignment here. The
buffer should be allocated by read_file_2(). Could you replace the
call to calloc there with a memalign() call aligning to something like
64 bytes?

Could be a red herring though.

include/mach/socfpga/lowlevel.h: start_socfpga_c5_common() >>> calling
barebox_arm_entry()...
uncompress.c: memory at 0x00000000, size 0x40000000
mmu: enabling MMU, ttb @ 0x3ffe0000
endmem                = 0x40000000
arm_mem_scratch       = 0x3fff8000+0x00008000
arm_mem_stack         = 0x3fff0000+0x00008000
arm_mem_ttb           = 0x3ffe0000+0x00010000
arm_mem_barebox_image = 0x3fe00000+0x00200000
arm_mem_early_malloc  = 0x3fde0000+0x00020000
membase               = 0x00000000+0x40000000
uncompress.c: uncompressing barebox binary at 0x1ff8c800 (size 0x00056b67)
to 0x3fe00000 (uncompressed size: 0x000778b0)
uncompress.c: jumping to uncompressed image at 0x3fe00001
uncompress.c: calling armv7_switch_to_hyp()...
uncompress.c: armv7_switch_to_hyp() OK. Now jumping...
Have you tried adding some debug output to barebox_non_pbl_start()?

pr_debug and friends will only work after setup_c() is called, but you
can either use putc_ll() before that or directly write to the UART TX
register.

Sascha



Reply via email to