LCDIF port 1 is directly attached to the LVDS Display Bridge (LDB). Both need the same clock source (VIDEO_PLL1).
Signed-off-by: Michael Grzeschik <[email protected]> --- arch/arm/dts/imx93.dtsi | 64 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm/dts/imx93.dtsi b/arch/arm/dts/imx93.dtsi index e1328de672438ffc8a3b785a3fb76168ced8dbdb..72059a39e4aefa21b18641b17a91c7a46ee05b4a 100644 --- a/arch/arm/dts/imx93.dtsi +++ b/arch/arm/dts/imx93.dtsi @@ -45,5 +45,69 @@ ddrc: memory-controller@4e300000 { compatible = "fsl,imx93-ddrc"; reg = <0x4e300000 0x400000>; }; + + system-controller@4ac10000 { + #address-cells = <1>; + #size-cells = <1>; + assigned-clocks = <&clk IMX93_CLK_MEDIA_AXI>, + <&clk IMX93_CLK_MEDIA_APB>, + <&clk IMX93_CLK_VIDEO_PLL>, + <&clk IMX93_CLK_MEDIA_DISP_PIX>; + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>, + <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>, + <&clk IMX93_CLK_24M>, + <&clk IMX93_CLK_VIDEO_PLL>; + assigned-clock-rates = <400000000>, <133333333>; + + lvds_bridge: bridge@20 { + compatible = "fsl,imx93-ldb"; + reg = <0x20 0x4>, <0x24 0x4>; + reg-names = "ldb", "lvds"; + clocks = <&clk IMX93_CLK_LVDS_GATE>; + clock-names = "ldb"; + assigned-clocks = <&clk IMX93_CLK_MEDIA_LDB>; + assigned-clock-parents = <&clk IMX93_CLK_VIDEO_PLL>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ldb_from_lcdif: endpoint { + remote-endpoint = <&lcdif_to_ldb>; + }; + }; + }; + }; + }; + + lcdif: display-controller@4ae30000 { + compatible = "fsl,imx93-lcdif"; + reg = <0x4ae30000 0x23c>; + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX93_CLK_MEDIA_DISP_PIX>, + <&clk IMX93_CLK_LCDIF_GATE>, + <&clk IMX93_CLK_MEDIA_AXI>; + clock-names = "pix", "axi", "disp_axi"; + assigned-clocks = <&clk IMX93_CLK_VIDEO_PLL>, + <&clk IMX93_CLK_MEDIA_DISP_PIX>; + assigned-clock-parents = <&clk IMX93_CLK_24M>, + <&clk IMX93_CLK_VIDEO_PLL>; + power-domains = <&media_blk_ctrl IMX93_MEDIABLK_PD_LCDIF>; + status = "disabled"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + lcdif_to_ldb: endpoint@1 { + reg = <1>; + remote-endpoint = <&ldb_from_lcdif>; + }; + }; + }; }; }; --- base-commit: 01508643e4a4bf685cb3e4b1d81e1501c99d7847 change-id: 20251127-imx93-dt-8e07073d320e Best regards, -- Michael Grzeschik <[email protected]>
