On 1/6/26 1:53 PM, Sascha Hauer wrote:
> Create position-independent exception vectors using relative branches
> instead of absolute addresses. This works on ARMv7 onwards which
> supports setting the address of the exception vectors.
> 
> New .text_inplace_exceptions section contains PC-relative branches,
> enabling barebox proper to start with MMU already configured using
> ELF segment addresses.
> 
> Signed-off-by: Sascha Hauer <[email protected]>

Reviewed-by: Ahmad Fatoum <[email protected]>

> ---
>  arch/arm/cpu/exceptions_32.S    | 20 ++++++++++++++++++++
>  arch/arm/cpu/interrupts_32.c    |  7 ++-----
>  arch/arm/cpu/no-mmu.c           | 11 +----------
>  arch/arm/include/asm/sections.h |  1 +
>  arch/arm/lib/pbl.lds.S          |  6 +++---
>  arch/arm/lib32/barebox.lds.S    |  4 ++++
>  6 files changed, 31 insertions(+), 18 deletions(-)
> 
> diff --git a/arch/arm/cpu/exceptions_32.S b/arch/arm/cpu/exceptions_32.S
> index 
> dc3d42663cbedd37947e27d449eb4ac8c3d8c3f1..85ee4ca3fd4e5aff8e1e02aa3d7375173a923072
>  100644
> --- a/arch/arm/cpu/exceptions_32.S
> +++ b/arch/arm/cpu/exceptions_32.S
> @@ -155,6 +155,26 @@ ENTRY(arm_fixup_vectors)
>  ENDPROC(arm_fixup_vectors)
>  #endif
>  
> +.section .text_inplace_exceptions
> +1:   b 1b                    /* barebox_arm_reset_vector */
> +#ifdef CONFIG_ARM_EXCEPTIONS
> +     b undefined_instruction /* undefined instruction */
> +     b software_interrupt    /* software interrupt (SWI) */
> +     b prefetch_abort        /* prefetch abort */
> +     b data_abort            /* data abort */
> +1:   b 1b                    /* (reserved) */
> +     b irq                   /* irq (interrupt) */
> +     b fiq                   /* fiq (fast interrupt) */
> +#else
> +1:   b 1b                            /* undefined instruction */
> +1:   b 1b                            /* software interrupt (SWI) */
> +1:   b 1b                            /* prefetch abort */
> +1:   b 1b                            /* data abort */
> +1:   b 1b                            /* (reserved) */
> +1:   b 1b                            /* irq (interrupt) */
> +1:   b 1b                            /* fiq (fast interrupt) */
> +#endif
> +
>  .section .text_exceptions
>  .globl extable
>  extable:
> diff --git a/arch/arm/cpu/interrupts_32.c b/arch/arm/cpu/interrupts_32.c
> index 
> 0b88db10fe487378fe08018701bc672f63139fc1..5dc4802fafbfdbcd54707b84835f40177e10742b
>  100644
> --- a/arch/arm/cpu/interrupts_32.c
> +++ b/arch/arm/cpu/interrupts_32.c
> @@ -231,10 +231,8 @@ static __maybe_unused int arm_init_vectors(void)
>        * First try to use the vectors where they actually are, works
>        * on ARMv7 and later.
>        */
> -     if (!set_vector_table((unsigned long)__exceptions_start)) {
> -             arm_fixup_vectors();
> +     if (!set_vector_table((unsigned long)__inplace_exceptions_start))
>               return 0;
> -     }
>  
>       /*
>        * Next try high vectors at 0xffff0000.
> @@ -264,7 +262,6 @@ void arm_pbl_init_exceptions(void)
>       if (cpu_architecture() < CPU_ARCH_ARMv7)
>               return;
>  
> -     set_vbar((unsigned long)__exceptions_start);
> -     arm_fixup_vectors();
> +     set_vbar((unsigned long)__inplace_exceptions_start);
>  }
>  #endif
> diff --git a/arch/arm/cpu/no-mmu.c b/arch/arm/cpu/no-mmu.c
> index 
> c4ef5d1f9d55136d606c244309dbeeb8fd988784..68246d71156c7c84b9faff452cebb37132b83573
>  100644
> --- a/arch/arm/cpu/no-mmu.c
> +++ b/arch/arm/cpu/no-mmu.c
> @@ -21,8 +21,6 @@
>  #include <asm/sections.h>
>  #include <asm/cputype.h>
>  
> -#define __exceptions_size (__exceptions_stop - __exceptions_start)
> -
>  static bool has_vbar(void)
>  {
>       u32 mainid;
> @@ -41,7 +39,6 @@ static bool has_vbar(void)
>  
>  static int nommu_v7_vectors_init(void)
>  {
> -     void *vectors;
>       u32 cr;
>  
>       if (cpu_architecture() < CPU_ARCH_ARMv7)
> @@ -58,13 +55,7 @@ static int nommu_v7_vectors_init(void)
>       cr &= ~CR_V;
>       set_cr(cr);
>  
> -     arm_fixup_vectors();
> -
> -     vectors = xmemalign(PAGE_SIZE, PAGE_SIZE);
> -     memset(vectors, 0, PAGE_SIZE);
> -     memcpy(vectors, __exceptions_start, __exceptions_size);
> -
> -     set_vbar((unsigned int)vectors);
> +     set_vbar((unsigned int)__inplace_exceptions_start);
>  
>       return 0;
>  }
> diff --git a/arch/arm/include/asm/sections.h b/arch/arm/include/asm/sections.h
> index 
> 15b1a6482a5b148284ab47de2db1c2653909da09..bf4fb7b109a7a22d9a298257af23a11b9efe6861
>  100644
> --- a/arch/arm/include/asm/sections.h
> +++ b/arch/arm/include/asm/sections.h
> @@ -13,6 +13,7 @@ extern char __dynsym_start[];
>  extern char __dynsym_end[];
>  extern char __exceptions_start[];
>  extern char __exceptions_stop[];
> +extern char __inplace_exceptions_start[];
>  
>  #endif
>  
> diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S
> index 
> 9c51f5eb3a3d8256752a78e03fed851c84d92edb..53b21084cff2e3d916cd37485281f2f78166c37d
>  100644
> --- a/arch/arm/lib/pbl.lds.S
> +++ b/arch/arm/lib/pbl.lds.S
> @@ -53,9 +53,9 @@ SECTIONS
>               *(.text_bare_init*)
>               __bare_init_end = .;
>               . = ALIGN(0x20);
> -             __exceptions_start = .;
> -             KEEP(*(.text_exceptions*))
> -             __exceptions_stop = .;
> +             __inplace_exceptions_start = .;
> +             KEEP(*(.text_inplace_exceptions*))
> +             __inplace_exceptions_stop = .;
>               *(.text*)
>       }
>  
> diff --git a/arch/arm/lib32/barebox.lds.S b/arch/arm/lib32/barebox.lds.S
> index 
> c704dd6d70f3ab157ceb67dfb14760e03f2a5d62..17e0970ba4989e5213ed38ea5ff87bdf5bfa2740
>  100644
> --- a/arch/arm/lib32/barebox.lds.S
> +++ b/arch/arm/lib32/barebox.lds.S
> @@ -26,6 +26,10 @@ SECTIONS
>               __exceptions_start = .;
>               KEEP(*(.text_exceptions*))
>               __exceptions_stop = .;
> +             . = ALIGN(0x20);
> +             __inplace_exceptions_start = .;
> +             KEEP(*(.text_inplace_exceptions*))
> +             __inplace_exceptions_stop = .;
>               *(.text*)
>       }
>       BAREBOX_BARE_INIT_SIZE
> 

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