On Thu, 15 Jan 2026 13:05:52 +0100, Ahmad Fatoum wrote:
> If a device is DMA-capable and cache-coherent, it can be considerably
> faster to keep shared memory cached, instead of mapping it uncached
> unconditionally like we currently do.
>
> This was very noticeable when using Virt I/O with KVM acceleration as
> described in commit 3ebd05809a49 ("virtio: don't use DMA API unless
> required").
>
> [...]
Applied, thanks!
[1/2] ARM: mmu: optimize dma_alloc_coherent for cache-coherent DMA masters
https://git.pengutronix.de/cgit/barebox/commit/?id=aefa14324910 (link may
not be stable)
[2/2] virtio: use DMA coherent APIs
https://git.pengutronix.de/cgit/barebox/commit/?id=c56e7af5fa98 (link may
not be stable)
Best regards,
--
Sascha Hauer <[email protected]>
