Implement the hs400_enhanced_strobe op so the dwcmshc controller samples on the eMMC strobe instead of the source clock when in HS400ES. The bit lives at EMMC_CONTROL[8] (DWCMSHC_ENHANCED_STROBE) in the same vendor area register that already holds CARD_IS_EMMC.
Assisted-by: Claude Opus 4.7 Signed-off-by: Sascha Hauer <[email protected]> --- drivers/mci/rockchip-dwcmshc-sdhci.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/mci/rockchip-dwcmshc-sdhci.c b/drivers/mci/rockchip-dwcmshc-sdhci.c index 2b55456f05..408b1e544a 100644 --- a/drivers/mci/rockchip-dwcmshc-sdhci.c +++ b/drivers/mci/rockchip-dwcmshc-sdhci.c @@ -19,6 +19,7 @@ #define DWCMSHC_HOST_CTRL3 0x508 #define DWCMSHC_EMMC_CONTROL 0x52c #define DWCMSHC_CARD_IS_EMMC BIT(0) +#define DWCMSHC_ENHANCED_STROBE BIT(8) #define DWCMSHC_EMMC_ATCTRL 0x540 /* Rockchip specific Registers */ @@ -363,12 +364,24 @@ static int rk_sdhci_execute_tuning(struct mci_host *mci, u32 opcode) return sdhci_execute_tuning(&host->sdhci, opcode); } +static void rk_sdhci_hs400_enhanced_strobe(struct mci_host *mci, + struct mci_ios *ios) +{ + struct rk_sdhci_host *host = to_rk_sdhci_host(mci); + u32 val; + + val = sdhci_read32(&host->sdhci, DWCMSHC_EMMC_CONTROL); + val |= DWCMSHC_ENHANCED_STROBE; + sdhci_write32(&host->sdhci, DWCMSHC_EMMC_CONTROL, val); +} + static const struct mci_ops rk_sdhci_ops = { .send_cmd = rk_sdhci_send_cmd, .set_ios = rk_sdhci_set_ios, .init = rk_sdhci_init, .card_present = rk_sdhci_card_present, .execute_tuning = rk_sdhci_execute_tuning, + .hs400_enhanced_strobe = rk_sdhci_hs400_enhanced_strobe, }; static int rk_sdhci_probe(struct device *dev) -- 2.47.3
